Results 261 to 270 of about 4,016 (298)

IDAMC: A NoC for mixed criticality systems

2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013
Increasing demand for performance and further integration promotes the use of multi- and many-core systems - also in safety-critical embedded systems. In this domain, hardware platforms obviously have to support real-time, predictability constrained applications such as an anti-lock braking system.
Sebastian Tobuschat, Philip Axer, Rolf Ernst, Jonas Diemer   +3 more
openaire   +1 more source

Temporal partitioning for mixed-criticality systems

ETFA2011, 2011
In embedded systems, such as aerospace crafts and automobiles, it is desirable to run several real-time applications of different criticality on a single computing board by exploiting temporal partitioning. The applications, however, are usually developed by different organizations independently.
Hyun-Wook Jin, Sanghyun Han
openaire   +1 more source

On-chip networks for mixed-criticality systems

2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2016
We propose the integration of a network-on-chip-based MPSoC in mixed-criticality systems, i.e. systems running applications with different criticality levels in terms of completing their execution within predefined time limits. An MPSoC contains tiles that can be either CPUs or memories, and we connect them with an instance of a customizable point-to ...
Polydoros Petrakis, Mohammed Abuteir, Miltos D. Grammatikakis, Kyprianos Papadimitriou, Roman Obermaisser, Zaher Owda, Antonis Papagrigoriou, Michael Soulie, Marcello Coppola   +8 more
openaire   +1 more source

Virtualizing Mixed-Criticality Operating Systems

2016 VI Brazilian Symposium on Computing Systems Engineering (SBESC), 2016
The forever growing number of embedded control units in some applications such as cars or airplanes are increasing system complexity and making harder to coordinate all this hardware. The increasing capacity of embedded hardware and the advances in virtualization technology make it possible to deal with this problem.
Rodrigo Schmitt Meurer, Mateus Krepsky Ludwich, Antônio Augusto Fröhlich   +2 more
openaire   +1 more source

An Adaptive Lockstep Architecture for Mixed-Criticality Systems

2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2021
software with different criticality levels. Currently, research mostly focuses on software aspects for those systems and disregards hardware aspects as well as fault tolerance. In this paper, we propose and investigate a novel processor architecture for adaptive fault tolerance.
Kempf, Fabian, Hartmann, Thomas, Bähr, Steffen, Becker, Jürgen   +3 more
openaire   +2 more sources

Scheduling of mixed-criticality systems with RUN

2015 IEEE 20th Conference on Emerging Technologies & Factory Automation (ETFA), 2015
Mixed-criticality systems emerged with the aim of reconciling safety requirements and efficient use of multi-processor or uniprocessor platforms. On multi-processors, recent works on mixed-criticality have produced impressive results in terms of speed-up factor. But these solutions, based on Pfair-like scheduling algorithms, entail too many preemptions
Romain Gratia, Thomas Robert 0003, Laurent Pautet   +2 more
openaire   +1 more source

Mixed-Criticality Systems as a Service for Non-critical Tasks

2016 IEEE 19th International Symposium on Real-Time Distributed Computing (ISORC), 2016
Mixed-Criticality Systems are capable of accommodatingtasks of varying criticality. In this paper, these are [life, mission, and non-critical]. Tasks usually have an overestimatedexecution time to allow for the Worst Case Execution Time(WCET). When these tasks finish execution prior to their allottedexecution time due to pessimistic assumptions present
Mahmood Hikmet, Matthew M. Y. Kuo, Partha S. Roop, Prakash Ranjitkar   +3 more
openaire   +1 more source

Criticality-Aware Partitioning for Multicore Mixed-Criticality Systems

2016 45th International Conference on Parallel Processing (ICPP), 2016
The scheduling for mixed-criticality (MC) systems, where multiple activities have different certification requirements and thus different criticality on a shared hardware platform, has recently become an important research focus. In this work, considering that multicore processors have emerged as the de-facto platform for modern embedded systems, we ...
Jian-Jun Han, Xin Tao, Dakai Zhu 0001, Hakan Aydin   +3 more
openaire   +1 more source

Implementing Mixed Criticality Systems in Ada

2011
Many safety-critical embedded systems are subject to certification requirements. However, only a subset of the functionality of the system may be safety-critical and hence subject to certification; the rest of the functionality is non safety-critical and does not need to be certified, or is certified to a lower level.
Sanjoy K. Baruah, Alan Burns 0001
openaire   +1 more source

Service guarantee exploration for mixed-criticality systems

2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014
Most mixed-criticality scheduling algorithms have the problem of service interruption for low-critical tasks, which has prompted several recent studies on providing various service guarantees for such tasks. In this paper, focusing on dual-criticality systems, we explore the best achievable service guarantees for low-critical tasks in different running
Hang Su 0008, Nan Guan, Dakai Zhu 0001
openaire   +1 more source