Results 51 to 60 of about 370 (180)
IET Cyber-Physical Systems: Theory &Applications, Volume 10, Issue 1, January/December 2025.This paper introduces an online distributed hardware scheduler that outperforms similar schedulers in terms of performance, predictability, power and energy consumption and temperature management. Implementing the scheduler in hardware results in fewer clock cycles, lower latency and greater efficiency compared to software implementations.
Mohammadreza Saberikia +2 more
wiley +1 more source
Collaborative Heterogeneous Computing on MPSoCs
CoRR, 2019 This thesis (extended abstract) presents the software development efforts toward efficient exploitation of heterogeneity through intricate mapping of computational kernels, collaborative execution of multiple processing elements and application-specific techniques.
openaire +2 more sources
Balancing Robustness and Efficiency in Embedded DNNs Through Activation Function Selection
Electronics Letters, Volume 61, Issue 1, January/December 2025.This paper investigates the use of bounded activation functions to improve the robustness of deep neural networks against parameter perturbations caused by soft errors. Focusing on encoder–decoder convolutional models for semantic segmentation of hyperspectral images in autonomous driving systems, the study evaluates the impact of activation function ...
Jon Gutiérrez‐Zaballa +2 more
wiley +1 more source
MAToC: A Novel Match-Action Table Architecture on Corundum for 8 × 25G Networking
Applied Sciences, 2022 Packet processing offloads are increasingly needed by high-speed networks. This paper proposes a high throughput, low latency, scalable and reconfigurable Match-Action Table (MAT) architecture based on the open source FPGA-based NIC Corundum.
Jiawei Lin, Zhichuan Guo, Xiao Chen
doaj +1 more source
Latency‐Aware Cross‐Layer Signaling for Energy‐Efficient CRNs
International Journal of Distributed Sensor Networks, Volume 2025, Issue 1, 2025.With the rapid development of wireless communication technology and the increasing scarcity of spectrum resources, cognitive radio networks (CRNs) have emerged as an effective means to improve spectrum utilization. This paper investigates the cross‐layer design (CLD) issues in CRNs, exploring the collaborative mechanisms among the physical layer, MAC ...
Huajun Chen +5 more
wiley +1 more source
On‐Orbit Fast Small Target Detection Method Based on the Improved YOLOv5 Model
International Journal of Aerospace Engineering, Volume 2025, Issue 1, 2025.Small target detection in remote sensing images is a challenging research field. Real‐time on‐orbit small target detection is of great significance for rapid discovery and tracking of remote sensing targets. In this paper, the feasibility of automotive‐grade system on chips (SoC) to achieve on‐orbit high‐performance computing is analyzed, and a high ...
Qilong Li +2 more
wiley +1 more source
HyperSense: Hyperdimensional Intelligent Sensing for Energy‐Efficient Sparse Data Processing
Advanced Intelligent Systems, Volume 6, Issue 12, December 2024.The article introduces HyperSense, a novel system that enhances sensor efficiency through hyperdimensional computing. This innovative approach significantly reduces unnecessary data processing by focusing solely on crucial information, saving energy, and improving both the speed and accuracy of data analysis. Ideal for real‐world applications, it holds
Sanggeon Yun +8 more
wiley +1 more source
Piezoelectric deicing system for aeronautics: Extensional mode actuator and power supply
IET Power Electronics, Volume 17, Issue 16, Page 2944-2955, 16 December 2024.This contribution addresses two interdependent parts of the deicing system: The piezoelectric actuator designed for breaking ice over a large area and its power supply, a 1 kW/200 V/2 MHz auxiliary resonant commutated pole inverter (ARCPI). The choice of this converter is based on specific application constraints, such as varying the operating ...
Modar Jomaa +4 more
wiley +1 more source
Low-Cost Fault Tolerant Methodology for Real Time MPSoC Based Embedded System
International Journal of Reconfigurable Computing, 2014 We are proposing a design methodology for a fault tolerant homogeneous MPSoC having additional design objectives that include low hardware overhead and performance.
Mohsin Amin +4 more
doaj +1 more source
Customized MPSoC synthesis for task sequence [PDF]
2011 IEEE 9th Symposium on Application Specific Processors (SASP), 2011 Multiprocessor System-on-Chip (MPSoC) platforms have become increasingly popular for high-performance embedded applications. Each processing element (PE) on such platforms can be tuned to match the computational demands of the tasks executing on it, creating a heterogeneous multiprocessor system.
Liang Chen +2 more
openaire +1 more source