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Proceedings of the 5th Annual Workshop on Cyber Security and Information Intelligence Research: Cyber Security and Information Intelligence Challenges and Strategies, 2009
This research presents a hierarchical formal model capable of providing adjustable levels of service and quality of assurance, which is especially suitable for multi-core processor systems. The multi-layered architecture supports multiple levels of fault detection, masking, and dynamic load balancing.
Axel Krings +3 more
openaire +1 more source
This research presents a hierarchical formal model capable of providing adjustable levels of service and quality of assurance, which is especially suitable for multi-core processor systems. The multi-layered architecture supports multiple levels of fault detection, masking, and dynamic load balancing.
Axel Krings +3 more
openaire +1 more source
Heterogeneous multi-core systems
Proceedings of the 2012 workshop on Domain-specific modeling, 2012This paper examines tradeoffs in extending a UML profile, or developing a new DSML for a particular domain. Questions are presented which help to make an objective decision. A case study is presented to address system design in heterogeneous multi-core systems.
David McKean, Jonathan Sprinkle
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Dynamic scheduler for multi-core systems
2010 2nd International Conference on Software Technology and Engineering, 2010Many dynamic scheduling algorithms have been proposed in the past. With the advent of multi core processors, there is a need to schedule multiple tasks on multiple cores. The scheduling algorithm needs to utilize all the available cores efficiently. The multicore processors may be SMPs or AMPs with shared memory architecture.
Vinay G. Vaidya +2 more
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Debugging Multi-Core Systems-on-Chip
2010In this chapter, we introduced three fundamental reasons why debugging a multi-processor SoC is intrinsically difficult; (1) limited internal observability, (2) asynchronicity, and (3) non-determinism.
Vermeulen, B., Goossens, K.G.W.
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High capacity multi-core fiber systems
2016 21st European Conference on Networks and Optical Communications (NOC), 2016We review progress on high-capacity multi-core fiber systems based on homogeneous, single mode MCF and focus on the limits of high capacity transmission. We discuss issues of inter-core crosstalk, dynamic inter-core skew and their impact on multi-core fiber systems such as pilot-tone transmission and high-dimensional modulation formats.
B. J. Puttnam +6 more
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2013
Multiple processors, microcontrollers, or DSPs have been used in embedded systems to distribute control and data flow according to the application at hand. The recent trends of incorporating multiple cores in the same chip significantly expands the processing power of such heterogeneous systems.
Ricardo Chessini Bose +5 more
openaire +1 more source
Multiple processors, microcontrollers, or DSPs have been used in embedded systems to distribute control and data flow according to the application at hand. The recent trends of incorporating multiple cores in the same chip significantly expands the processing power of such heterogeneous systems.
Ricardo Chessini Bose +5 more
openaire +1 more source