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Step-wise synthesis of CCD MVL functions

Proceedings of the Twentieth International Symposium on Multiple-Valued Logic, 2002
A new approach for synthesis of single-variable functions in CCD (charge-coupled-device) technology is presented. It is based on primitive functions that rely heavily on the functions realizable with single overflow gates. Positive and negative steps in logic levels are decomposed into patterns realizable with the primitive functions.
S.G. Zaky   +2 more
openaire   +1 more source

Generic implementation of DD packages in MVL

Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium, 1999
This paper presents a generic approach to implementation of Decision Diagrams (DDs) for representation and manipulation of Multi-Valued Logic (MVL) functions. The core package is based on recursive synthesis operations, where the recursive step is given by a table look-up technique.
R. Drechsler   +2 more
openaire   +1 more source

Design of novel Multiple Valued Logic (MVL) circuits

2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2), 2017
Background: Multiple-Valued Logic (MVL) is the non-binary-valued system, in which more than two levels of information content are available, i.e., L>2. In modern technologies, the dual level binary logic circuits have normally been used. However, these suffer from several significant issues such as the interconnection considerations including the ...
B. Srinivasa Raghavan   +1 more
openaire   +1 more source

A Continuous MVL Gate using Pseudo Floating-Gate

2007 14th International Conference on Mixed Design of Integrated Circuits and Systems, 2007
In this paper we present a multiple-valued gate using pseudo floating-gate. One of the key advantages is the possibility to operate this gate in continuous mode. The avoidance of recharging the floating-gate (recharge-signal) is shown to be quite liberating and to possess new and powerful qualities. Simulation results are provided.
O. Mirmotahari, J. Lomsdalen, Y. Berg
openaire   +1 more source

Descending Order Transformation-based Synthesis of MVL Reversible Circuits

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL), 2021
Transformation-based synthesis is a straightforward technique for determining a circuit for a reversible function. Various methods employing the transformation-based approach have been previously proposed. For an r-valued function, the existing methods consider the function specification in ascending order from the input assignment 0,0,…,0 to the input
D. Michael Miller, Gerhard W. Dueck
openaire   +1 more source

Layered MVL neural networks capable of recognizing translated characters

[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic, 2003
The multivalued logic (MVL) neurons constituting the layered MVL neural network use MVL operations to produce analog responses to be fed to the respective quantizers. A four-layered MVL neural network model capable of recognizing translated characters is presented.
T. Watanabe, M. Matsumoto
openaire   +1 more source

The MVL theorem proving system

ACM SIGART Bulletin, 1991
The MVL theorem-proving system is an implementation of theoretical work currently under way at Stanford University. Theoretical progress made there is regularly included in MVL in order to ensure that the ideas developed theoretically can be tested experimentally as well.
openaire   +1 more source

RCM-MVI: a recursive consensus MVL minimization algorithm

Proceedings of the Twentieth International Symposium on Multiple-Valued Logic, 2002
A heuristic minimization algorithm based on the recursive application of the familiar consensus operation is presented. Unlike traditional consensus-based algorithms, it allows for the early detection of essential and pseudoessential prime implicants. This means that a solution is usually determined without all prime implicants being generated.
G.W. Dueck, D.M. Miller
openaire   +1 more source

MVL‐PUFs: multiple‐valued logic physical unclonable functions

International Journal of Circuit Theory and Applications, 2016
SummaryPhysical unclonable functions (PUFs) are promising hardware security primitives suitable for protecting resource‐constrained devices. In this paper, we propose to use multiple‐valued logic (MVL) for implementing hardware‐efficient PUF integrated circuits.
Sha Tao, Elena Dubrova
openaire   +1 more source

MVL: medical VR simulation library.

Studies in health technology and informatics, 2005
In the last ten years, medical VR techniques have much progress and many simulators have been developed for education, planning, rehearsal and so on. On the other hand, developing a simulator takes much more labor and cost. In this paper, we propose MVL: Medical Virtual reality simulation Library, which supports simulation of several significant ...
Yoshihiro, Kuroda   +4 more
openaire   +1 more source

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