Results 141 to 150 of about 3,273 (164)
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Spectral transforms of mixed-radix MVL functions
33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings., 2004Mixed-radix "Multiple Valued Logic" (MVL) functions are assumed to be finite and discrete-valued and depend on a finite-valued variable support set {x/sub i/,...,x/sub j/} such that x/sub i/ is q/sub i/-valued and x/sub j/ is q/sub j/-valued with q/sub i/ /spl ne/ q/sub j/.
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Technique of computing logic derivatives for MVL-functions
Proceedings of 26th IEEE International Symposium on Multiple-Valued Logic (ISMVL'96), 2002A technique to compute logic derivatives of MVL-functions is considered based on four algorithms, two of them are new. At first these are symbolic and matrix algorithms to find logic derivatives with respect to variables, and, secondly, partial direct and inverse derivatives.
V.P. Shmerko +3 more
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Boundary Surface Visualization of MVL Memory: from 2D to 3D
2021 IEEE International Conference on Modern Electrical and Energy Systems (MEES), 2021The article presents for the first time a gallery of 3D boundary surfaces of a multi-value memory cell. In the analysis, we chose such sizes of parasitic elements on the chip, in which there are no stable limit cycles present in the memory, assuming that the absence of stable limit cycles will greatly simplify the transcription of information in the ...
Milan Guzan +5 more
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Algorithmic synthesis of MVL functions for CCD implementation
IEEE Transactions on Computers, 1991Algorithms for synthesis of four-valued one- and two-variable functions for CCD (charge coupled device) implementation are proposed. One-variable synthesis is based on the observation that the cost of a realization of a function f(x) increases in the presence of breaks, or negative transitions, in the value of f as x increases.
M.H. Abd-El-Barr +2 more
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Direct cover MVL minimization with cost-tables
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic, 2003A direct cover algorithm for minimizing multivalued logic functions is described. The use of cost tables facilitates cost efficient implementations. Current-mode CMOS circuits are considered as target implementations. However, the algorithm can be readily adapted to different technologies by making appropriate changes in the cost tables.
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Generating Synthetic MVL Benchmarks from Random MDDs Under Restrictions
2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 2018Since standard benchmark functions for analysis of multiple-valued logic (MVL) designs are not widely available, benchmark functions for binary logic design are often used in this area after an appropriate encoding of function values and possibly padding with zeros.
Milos Radmanovic, Radomir Stankovic
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Synthesis of MVL functions using input and output assignments
IEE Proceedings - Circuits, Devices and Systems, 1998A number of decomposition based mapping techniques are proposed. In these techniques, the synthesis problem is formulated as a mapping from an input matrix to an output matrix. The minimisation is obtained by constructing a 'matching-count matrix'. The entries of the matching-count matrix MC ij represent the number of entry matches between the input ...
M. Abd-El-Barr, G.A. Hamid, M.N. Hasan
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PSYNDEX Tests Review für MVL - Marburger Verhaltensliste
1986Diagnostische Zielsetzung: Die MVL kann als Screeningverfahren zur Abklärung der Therapiebedürftigkeit eingesetzt werden. Außerdem kann das Verfahren bei der Kontrolle der Wirksamkeit von Psychotherapie und bei der Schulung von Beurteilern Anwendung finden.
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A new structure for CMOS realization of MVL functions
International Journal of Electronics, 1993A new structure is proposed for the realization of multiple-valued logic (MVL) functions. Multiple-valued logic levels are represented in terms of current values, which represent the inputs and the outputs of the MVL circuits. Binary voltage signals are generated inside the structure by using a circuit element called threshold.
A. K. JAIN +2 more
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