Results 161 to 170 of about 14,985 (201)

Digital genetic counselling services for cascade cardiogenetic testing: a focus group study on proband, relative, and provider perspectives

open access: yes
van Lingen MN   +8 more
europepmc   +1 more source

Design of MVL Operands

IETE Journal of Research, 1990
A ternary logic operand implementation scheme in 3-μ CMOS technology is presented. Both unary and multiple input operands are designed by cascading threshold detectors with pass-transistors. The circuits have negligible dc dissipation and occupy a small chip area. This scheme is extendable as given any ternary logic operand, its circuit can be obtained.
Hitesh Ahuja, D Nagchoudhuri
openaire   +1 more source

Expandable MVL Inverter Compatible with Standard CMOS Process and Its Application to MVL Hysteresis Comparator

2013 IEEE 43rd International Symposium on Multiple-Valued Logic, 2013
In this paper, a novel voltage-mode MVL inverter is proposed. The proposed inverter consists of two circuit blocks: MVL threshold comparator and Multi-level generator, which can be implemented by standard CMOS technologies. Next, the inverted MVL hysteresis comparator is also proposed as the application of the proposed MVL inverter.
A. A. Mannan   +4 more
openaire   +1 more source

Design and implementation of MVL

ACM SIGGRAPH 2005 Posters on - SIGGRAPH '05, 2005
Developing medical VR simulators takes much labor and cost because of its complexity and high requirements for simulation. In this paper, we propose MVL, which gives simulation modules of several significant medical manipulations considering multiple organ interaction.
Yoshihiro Kuroda   +4 more
openaire   +1 more source

MVL: Multi-View Learning for News Recommendation

Proceedings of the 43rd International ACM SIGIR Conference on Research and Development in Information Retrieval, 2020
In this paper, we propose a Multi-View Learning (MVL) framework for news recommendation which uses both the content view and the user-news interaction graph view. In the content view, we use a news encoder to learn news representations from different information like titles, bodies and categories.
T.Y.S.S Santosh   +2 more
openaire   +1 more source

Arithmetic Algorithms and Circuits to Convert MVL to MVL Coded Decimal and Vice Versa

2008 3rd International Conference on Information and Communication Technologies: From Theory to Applications, 2008
The purpose of this paper is to present new algorithms and circuits to convert from MVL (Multiple Valued Logic) to MVL Coded Decimal (MVL-CD) and vice versa. We will introduce two conversion techniques: the first one is called "Addition-Subtraction technique" (AST) while the other method is called "Division-Multiplication Technique" (DMT). Based on AST,
Hassan Amine Osseily, Ali Massoud Haidar
openaire   +1 more source

Step-wise synthesis of CCD MVL functions

Proceedings of the Twentieth International Symposium on Multiple-Valued Logic, 2002
A new approach for synthesis of single-variable functions in CCD (charge-coupled-device) technology is presented. It is based on primitive functions that rely heavily on the functions realizable with single overflow gates. Positive and negative steps in logic levels are decomposed into patterns realizable with the primitive functions.
S.G. Zaky   +2 more
openaire   +1 more source

Generic implementation of DD packages in MVL

Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium, 1999
This paper presents a generic approach to implementation of Decision Diagrams (DDs) for representation and manipulation of Multi-Valued Logic (MVL) functions. The core package is based on recursive synthesis operations, where the recursive step is given by a table look-up technique.
R. Drechsler   +2 more
openaire   +1 more source

Design of novel Multiple Valued Logic (MVL) circuits

2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2), 2017
Background: Multiple-Valued Logic (MVL) is the non-binary-valued system, in which more than two levels of information content are available, i.e., L>2. In modern technologies, the dual level binary logic circuits have normally been used. However, these suffer from several significant issues such as the interconnection considerations including the ...
B. Srinivasa Raghavan   +1 more
openaire   +1 more source

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