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A Continuous MVL Gate using Pseudo Floating-Gate
2007 14th International Conference on Mixed Design of Integrated Circuits and Systems, 2007In this paper we present a multiple-valued gate using pseudo floating-gate. One of the key advantages is the possibility to operate this gate in continuous mode. The avoidance of recharging the floating-gate (recharge-signal) is shown to be quite liberating and to possess new and powerful qualities. Simulation results are provided.
O. Mirmotahari, J. Lomsdalen, Y. Berg
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Descending Order Transformation-based Synthesis of MVL Reversible Circuits
2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL), 2021Transformation-based synthesis is a straightforward technique for determining a circuit for a reversible function. Various methods employing the transformation-based approach have been previously proposed. For an r-valued function, the existing methods consider the function specification in ascending order from the input assignment 0,0,…,0 to the input
D. Michael Miller, Gerhard W. Dueck
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Layered MVL neural networks capable of recognizing translated characters
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic, 2003The multivalued logic (MVL) neurons constituting the layered MVL neural network use MVL operations to produce analog responses to be fed to the respective quantizers. A four-layered MVL neural network model capable of recognizing translated characters is presented.
T. Watanabe, M. Matsumoto
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The MVL theorem proving system
ACM SIGART Bulletin, 1991The MVL theorem-proving system is an implementation of theoretical work currently under way at Stanford University. Theoretical progress made there is regularly included in MVL in order to ensure that the ideas developed theoretically can be tested experimentally as well.
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RCM-MVI: a recursive consensus MVL minimization algorithm
Proceedings of the Twentieth International Symposium on Multiple-Valued Logic, 2002A heuristic minimization algorithm based on the recursive application of the familiar consensus operation is presented. Unlike traditional consensus-based algorithms, it allows for the early detection of essential and pseudoessential prime implicants. This means that a solution is usually determined without all prime implicants being generated.
G.W. Dueck, D.M. Miller
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MVL‐PUFs: multiple‐valued logic physical unclonable functions
International Journal of Circuit Theory and Applications, 2016SummaryPhysical unclonable functions (PUFs) are promising hardware security primitives suitable for protecting resource‐constrained devices. In this paper, we propose to use multiple‐valued logic (MVL) for implementing hardware‐efficient PUF integrated circuits.
Sha Tao, Elena Dubrova
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MVL: medical VR simulation library.
Studies in health technology and informatics, 2005In the last ten years, medical VR techniques have much progress and many simulators have been developed for education, planning, rehearsal and so on. On the other hand, developing a simulator takes much more labor and cost. In this paper, we propose MVL: Medical Virtual reality simulation Library, which supports simulation of several significant ...
Yoshihiro, Kuroda +4 more
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Spectral transforms of mixed-radix MVL functions
33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings., 2004Mixed-radix "Multiple Valued Logic" (MVL) functions are assumed to be finite and discrete-valued and depend on a finite-valued variable support set {x/sub i/,...,x/sub j/} such that x/sub i/ is q/sub i/-valued and x/sub j/ is q/sub j/-valued with q/sub i/ /spl ne/ q/sub j/.
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Technique of computing logic derivatives for MVL-functions
Proceedings of 26th IEEE International Symposium on Multiple-Valued Logic (ISMVL'96), 2002A technique to compute logic derivatives of MVL-functions is considered based on four algorithms, two of them are new. At first these are symbolic and matrix algorithms to find logic derivatives with respect to variables, and, secondly, partial direct and inverse derivatives.
V.P. Shmerko +3 more
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Boundary Surface Visualization of MVL Memory: from 2D to 3D
2021 IEEE International Conference on Modern Electrical and Energy Systems (MEES), 2021The article presents for the first time a gallery of 3D boundary surfaces of a multi-value memory cell. In the analysis, we chose such sizes of parasitic elements on the chip, in which there are no stable limit cycles present in the memory, assuming that the absence of stable limit cycles will greatly simplify the transcription of information in the ...
Milan Guzan +5 more
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