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Descending Order Transformation-based Synthesis of MVL Reversible Circuits

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL), 2021
Transformation-based synthesis is a straightforward technique for determining a circuit for a reversible function. Various methods employing the transformation-based approach have been previously proposed. For an r-valued function, the existing methods consider the function specification in ascending order from the input assignment 0,0,…,0 to the input
D. Michael Miller, Gerhard W. Dueck
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Step-wise synthesis of CCD MVL functions

Proceedings of the Twentieth International Symposium on Multiple-Valued Logic, 2002
A new approach for synthesis of single-variable functions in CCD (charge-coupled-device) technology is presented. It is based on primitive functions that rely heavily on the functions realizable with single overflow gates. Positive and negative steps in logic levels are decomposed into patterns realizable with the primitive functions.
Safwat G. Zaky   +2 more
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Technique of computing logic derivatives for MVL-functions

Proceedings of 26th IEEE International Symposium on Multiple-Valued Logic (ISMVL'96), 2002
A technique to compute logic derivatives of MVL-functions is considered based on four algorithms, two of them are new. At first these are symbolic and matrix algorithms to find logic derivatives with respect to variables, and, secondly, partial direct and inverse derivatives.
Vlad P. Shmerko   +3 more
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Algorithmic synthesis of MVL functions for CCD implementation

IEEE Transactions on Computers, 1991
Algorithms for synthesis of four-valued one- and two-variable functions for CCD (charge coupled device) implementation are proposed. One-variable synthesis is based on the observation that the cost of a realization of a function f(x) increases in the presence of breaks, or negative transitions, in the value of f as x increases.
Mostafa I. H. Abd-El-Barr   +2 more
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The evaluation of full sensitivity for test generation in MVL circuits

Proceedings 25th International Symposium on Multiple-Valued Logic, 2002
The evaluation of a method for test generation for MVL circuits, based on the notion of full sensitivity, is given. The estimation is made on the functional level, by establishing a lower bound on the number of m-valued n-variable functions that are fully sensitive to all their variables.
Elena Dubrova   +2 more
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Heuristic Minimization of MVL Functions: A Direct Cover Approach

IEEE Transactions on Computers, 1986
A heuristic method to obtain near-minimal covers of p-valued switching functions is introduced. First, we describe transform tools useful in the processing of MVL functions. They are: p-adic shifting, weighting, and implicant detecting transformations. Based on these tools, a direct cover algorithm is presented that uses local information for heuristic
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MVL Flash Memory

2022
Zarin Tasnim Sandhie   +2 more
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MVL Sequential Circuits

2022
Zarin Tasnim Sandhie   +2 more
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MVL Random Access Memory

2022
Zarin Tasnim Sandhie   +2 more
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