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Noise‐margin analysis of a‐Si:H digital circuits
Journal of the Society for Information Display, 2007Abstract— The noise margin is one of the fundamental metrics in evaluating the viability and robustness of digital circuits. An analytical model of amorphous‐silicon digital‐circuit noise margin was developed, including the effects of circuit aging. The threshold voltage of a‐Si:H transistors increases over time with electrical stress, degrading the ...
Zi Li +4 more
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Noise margins for Josephson logic and memory devices
IEEE Transactions on Magnetics, 1983Noise which can produce erroneous transitions in Josephson logic devices can be treated in terms of the familiar model for thermal activation of a particle over a potential barrier. Noise curves are calculated which represent the effective threshold curves for a given transition rate; this approach can be applied to the mode-to-mode (superconducting ...
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Noise margin analysis for dynamic logic circuits
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005., 2005Suwen Yang, Mark R. Greenstreet
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Influence of Transistor Parameters on the Noise Margin of Organic Digital Circuits
IEEE Transactions on Electron Devices, 2006Jan Genoe, Paul Heremans
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Analytical Review of Noise Margin in MVL: Clarification of a Deceptive Matter
Circuits, Systems, and Signal Processing, 2019Reza Faghih Mirzaee +2 more
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Small Margin Ensembles Can Be Robust to Class-Label Noise
Neurocomputing, 2015Gonzalo Martínez-Muñoz +2 more
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Flexible and High Noise Margin Organic Enhancement Inverter Using Hybrid Insulator
Thin Solid Films, 2017Yong-Sang Kim +2 more
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