Results 191 to 200 of about 72,189,252 (249)
Radiative Thermal Management for Extreme Environments: Mechanisms and Design Strategies
In this review, we discuss the fundamental mechanisms of radiative cooling and solar heating, material and structural design strategies, hybrid approaches integrating additional heat transfer pathways, and durability‐oriented designs addressing environmental stresses.
Hyung Rae Kim +5 more
wiley +1 more source
Lab on Chip 3D Holographic Imaging
3D imaging approaches based on holographic modality have been developed for Labon- Chip devices. Exploiting Digital Holography features a number of applications are illustrated thus demonstrating its great potentialities as coherent imaging tool for bio-microfluidic platform. © 2014 OSA.
Miccio L +7 more
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Journal of Biophotonics, 2012
AbstractChip‐scale microscopy imaging platforms are pivotal for improving the efficiency of modern biomedical and bioscience experiments. Their integration with other lab‐on‐a‐chip techniques would allow rapid, reliable and high‐throughput sample analysis for applications in diverse disciplines.
Changhuei Yang, Guoan Zheng
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AbstractChip‐scale microscopy imaging platforms are pivotal for improving the efficiency of modern biomedical and bioscience experiments. Their integration with other lab‐on‐a‐chip techniques would allow rapid, reliable and high‐throughput sample analysis for applications in diverse disciplines.
Changhuei Yang, Guoan Zheng
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Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03., 2003
This paper presents a complete Single-chip Stereo Imager (SSI), incorporating two 128 × 128 pixel current-mode imagers and current-mode analog computation circuitry on a single integrated circuit. A modified version of block matching is used to find the stereo disparity at each location in the field of view.
Ralf M. Philipp, Ralph Etienne-Cummings
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This paper presents a complete Single-chip Stereo Imager (SSI), incorporating two 128 × 128 pixel current-mode imagers and current-mode analog computation circuitry on a single integrated circuit. A modified version of block matching is used to find the stereo disparity at each location in the field of view.
Ralf M. Philipp, Ralph Etienne-Cummings
openaire +1 more source
Optical imaging applied to microelectronic chip-to-chip interconnections
Applied Optics, 1985An imaging system is proposed as an alternative to metallized connections between integrated circuits. Power requirements for metallized interconnects and electrooptic links are compared. A holographic optical element is considered as the imaging device.
R K, Kostuk, J W, Goodman, L, Hesselink
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A chip set for lossless image compression
IEEE Journal of Solid-State Circuits, 1991The authors describe two chips which form the basis of a high-speed lossless image compression/decompression system. They present the transform and coding algorithms and the main architectural features of the chips and outline some performance specifications.
Imran Shah +2 more
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A JPEG Chip for Image Compression and Decompression
Journal of VLSI signal processing systems for signal, image and video technology, 2003zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Sung-Hsien Sun, Shie-Jue Lee
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Image processing address generator chip
ICASSP '85. IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005Accurate high speed rotation, warpage, translation, or rescaling of a two-dimensional image requires large RAMs, fast multiplier accumulators (MACs), and sophisticated address generators and controllers. TRW is designing a CM36 integrated circuit that generates the necessary control signals and data and coefficient addresses, economically replacing ...
John A. Eldon +2 more
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A real-time image denoising chip
2008 IEEE International Symposium on Circuits and Systems (ISCAS), 2008In this paper, we present a real-time image denoising chip. For each pixel of the image under processing, our design uses a mask on it to determine whether it is likely being corrupted by impulse noise or not. After the noise detection, we reconstruct the noisy pixel by considering the possible edges existed in the mask.
Pei-Yin Chen +2 more
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A programmable spatiotemporal image processor chip
2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353), 2002A 16/spl times/16 pixel pseudo general-purpose vision chip for spatiotemporal focal-plane processing is presented. The convolution of the image with programmable kernels are realized with area-efficient and real-time circuits. The chip's architecture allows the photoreceptor cells to be small and densely packed by performing all analog computations on ...
Viktor Gruev, Ralph Etienne-Cummings
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