Results 81 to 90 of about 1,869 (239)
RRAM Variability Harvesting for CIM‐Integrated TRNG
This work demonstrates a compute‐in‐memory‐compatible true random number generator that harvests intrinsic cycle‐to‐cycle variability from a 1T1R RRAM array. Parallel entropy extraction enables high‐throughput bit generation without dedicated circuits. This approach achieves NIST‐compliant randomness and low per‐bit energy, offering a scalable hardware
Ankit Bende +4 more
wiley +1 more source
Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho +6 more
wiley +1 more source
ABSTRACT With the continuous development of computer image processing, developing efficient and low‐power computing devices has become a key challenge. Memristors have integrated in‐situ storage and computing capabilities, making them an ideal choice for low‐power image processing computing architectures. However, current memristors are confronted with
Tengyu Li +4 more
wiley +1 more source
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez +10 more
wiley +1 more source
On the Role of Preprocessing and Memristor Dynamics in Reservoir Computing for Image Classification
ABSTRACT Reservoir computing (RC) is an emerging recurrent neural network architecture that has attracted growing attention for its low training cost and modest hardware requirements. Memristor‐based circuits are particularly promising for RC, as their intrinsic dynamics can reduce network size and parameter overhead in tasks such as time‐series ...
Rishona Daniels +4 more
wiley +1 more source
High-Speed and Low-Power Flash ADCs Encoder
This paper presents a high-speed, low-power and low area encoder for implementation of flash ADCs. Key technique for design of this encoder is performed by convert the conventional 1-of-N thermometer code to 2-of-M codes (M = ¾ N ...
M. Soleimani, S. Toofan
doaj
Passive resistive memory arrays promise efficient in‐memory computing but suffer from sneak paths and programming variability. Here, highly uniform 32 × 32 passive RRAM crossbars are programmed with multilevel precision below 3% error and 99.5% yield.
S. Ricci +6 more
wiley +1 more source
Blind Estimation of Sparse Broadband Massive MIMO Channels With Ideal and One-bit ADCs
Submitted to IEEE Transactions on Signal ...
Amine Mezghani, A. Lee Swindlehurst
openaire +4 more sources
Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source

