Results 121 to 130 of about 2,127 (187)
Some of the next articles are maybe not open access.
Phase Locked Loop PLL-Based Frequency Synthesizers: A General Overview
Smart Innovation, Systems and Technologies, 2019This work summarizes the operating features for type II second-order Phase-Locked Loop (PLL)-based Frequency Synthesizers (FS) from the set of equations of linear dynamic modeling for defining the corresponding block level and system level transfer functions and developing the reference design equations for the Low Pass Filter (LPF) components sizing.
Agord de Matos Pinto Junior +2 more
exaly +2 more sources
Active Filter Circuits and Phase-Locked Loop (PLL)
2021Active filters and phase-locked loop (PLL) and its applications are discussed in this chapter. To get acquainted with the design of active filters and the applicability in instrumentation, low pass, high pass and band pass filters are explained. The frequency selection in audio or music systems is utmost important. The selection of lower and higher cut-
Shrikrishna Yawale, Sangita Yawale
openaire +1 more source
THE EFFECT OF THE FORCING FUNCTION ON DISRUPTION OF A PHASE-LOCKED LOOP (PLL)
International Journal of Bifurcation and Chaos, 2000In this paper we compare the disruption of a second-order type II phase-locked loop (PLL) by two different waveforms: a sinusoid and a sawtooth. The choice of these two waveforms results from a novel approach to the problem of determining an appropriate forcing function for studying the disruption of such systems.
S. M. Booker +3 more
openaire +2 more sources
A new phase-locked loop (PLL) system
Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257), 2002An enhanced phase-locked loop (PLL) system is presented and its properties and performance characteristics are investigated. Advantages of the proposed PLL structure over the conventional PLLs including its capability of direct estimation of amplitude and phase angle of its input signal, within a wide range of parameters, are demonstrated.
M. Karimi-Ghartemani, M.R. Iravani
openaire +1 more source
Phase Locked Loop (PLL) Design
2011The last building block covered in the book is the Phase Locked Loop (PLL), virtually used in every integrated communication front-end. The complexity of this system is high; therefore the first section is dedicated to the basic concepts related to both PLL system architectures and basic components.
Unai Alvarado +2 more
openaire +1 more source
2010
PLL is the heart of practically all electronic components and or modules where different clock frequencies are required to synchronize the data transmitting and receiving to and from externals respectively. The input clock to the PLL is much lower than the DSP maximum clock frequency.
openaire +1 more source
PLL is the heart of practically all electronic components and or modules where different clock frequencies are required to synchronize the data transmitting and receiving to and from externals respectively. The input clock to the PLL is much lower than the DSP maximum clock frequency.
openaire +1 more source
1992
Eine Phasenregelschleife (PLL, Phase Locked Loop) ist ein Schaltkreis der einem externen Referenzsignal erlaubt, die Frequenz und die Phase eines Oszillators in der Schleife zu steuern. Die Frequenz des Oszillators in der Schleife kann dabei dieselbe wie die Referenzfrequenz sein oder ein Vielfaches davon.
openaire +1 more source
Eine Phasenregelschleife (PLL, Phase Locked Loop) ist ein Schaltkreis der einem externen Referenzsignal erlaubt, die Frequenz und die Phase eines Oszillators in der Schleife zu steuern. Die Frequenz des Oszillators in der Schleife kann dabei dieselbe wie die Referenzfrequenz sein oder ein Vielfaches davon.
openaire +1 more source
Optimization of Phase-Locked Loop (PLL) System Parameters
2004The paper investigates the optimization of parameters for digital phase-locked loop (PLL) systems in order to enhance noise immunity. A Gaussian distribution is assumed for phase deviations of input sync pulses. A mathematical model of the PLL is developed, and a quality criterion based on the output phase deviation variance is proposed. Constraints on
Abdullayev, Isa M. +1 more
openaire +1 more source
Development of low power Phase-Locked Loop (PLL) and PLL-based serial transceiver
Journal of Instrumentation, 2012The design and measurement results of a low power Phase-Locked Loop (PLL) and a PLL-based transceiver for applications in readout systems of particle physics detectors, designed and fabricated in a 0.35 ?m CMOS technology, are presented. The measurements show that the prototype PLL is fully functional and generates the clock signal in the frequency ...
J Moroń, M Firlej, M Idzik
openaire +1 more source
Efficient digital techniques for implementing a class of fast phase-locked loops (PLL's)
IEEE Transactions on Industrial Electronics, 1996Circuit configurations making use of counters are described to efficiently implement controllers for time-optimal and finite-time responses in phase-locked loops (PLLs). The new PLLs, solving the responsiveness problem with conventional PLLs, require quite complicated operations, including adders and subtracters.
Fuminori Kobayashi +3 more
openaire +1 more source