Results 11 to 20 of about 20,323 (302)
PRINCIPLES OF PHASE-LOCKED LOOPS MATHEMATICAL MODELS CONSTRUCTION
The results of various embodiments study of the hardware and software phase-locked loops, suggesting possible variants of generalized mathematical models of the multi-systems as well as devices with a cyclic interrupt mode-locked are presented.
M. P. Batura +3 more
doaj +1 more source
Designing Of Pulse Phase-Locked Loops
The paper considers pulse phase-locked loops (PPLL) in which switching of structure and parameters is used for improvement of dynamic and spectral characteristics Classification of existing switching algorithms is given in the paper.
A. A. Deryushev +2 more
doaj +1 more source
Techniques for automatic on chip closed loop transfer function monitoring for embedded charge pump phase locked loops. [PDF]
Charge Pump Phase locked loops are used in a variety of applications, including on chip clock synthesis, symbol timing recovery for serial data streams, and generation of frequency agile high frequency carrier signals.
Burbidge, Martin J. +5 more
core +1 more source
A mode switching based transient ride‐through phase‐locked loop
In the case of grid voltage quality problems, the traditional phase‐locked loop (PLL) is hard to detect the accurate grid frequency and phase during the transient response, which will be detrimental to the transient synchronous stability of grid ...
Yiwen Fan +4 more
doaj +1 more source
Radar Waveform Generator with Fuzzy Frequency Regulation [PDF]
: The Phase-Locked Loop (PLL) is a common functional component in many electrical systems. Phase-locked loops (PLLs) are closed-loop feedback-driven devices producing a signal depending on the frequency and phase of reference sig-nal that comes in.
Ahmed Salem +2 more
doaj +1 more source
Homodyne coherent detection of ASK and PSK signals performed by a subcarrier optical phase-locked loop [PDF]
Optical transmission systems based on homodyne coherent detection of 2-ASK and pilot carrier 2-PSK signals have been implemented. ASK data has been transmitted at 2.5 Gbps, while 2.5 Gbps and 10 Gbps PSK systems have been tested.
S. Camatel +4 more
core +1 more source
This paper proposes a GPS receiver vector frequency-locked loop-assisted phase-locked loop (VFAPLL) structure based on the maximum likelihood estimation (MLE) method for highly dynamic weak-signal scenarios. In this structure, the loop structure does not
Na Li, Shufang Zhang, Yi Jiang
doaj +1 more source
Structural Resemblance Between Droop Controllers and Phase-Locked Loops
It is well known that droop control is fundamental to the operation of power systems and now the parallel operation of inverters, while phase-locked loops (PLLs) are widely adopted in modern electrical engineering.
Qing-Chang Zhong, Dushan Boroyevich
doaj +1 more source
Phase jitter dynamics of first-order digital phase-locked loops with frequency-modulated input
IEEE International Symposium on Circuits and Systems (ISCAS), Seattle, USA, 18-21 May 2008Inherent to digital phase-locked loops is frequency quantization in the number-controlled oscillator which prevents the loop from locking exactly onto its reference
Tertinek, Stefan +5 more
core +1 more source
Exact lock-in range for classical phase-locked loops
Phase-locked loops (PLLs) are are widely used in various applications: Wireless communications, GPS navigation, gyroscope systems, computer architectures, electrical grids, and others. PLLs are inherently non-linear, but in engineering practice, they are
Blagov, Mikhail
core +1 more source

