Results 1 to 10 of about 319,126 (249)
A Single-Event-Hardened Scheme of Phase-Locked Loop Microsystems for Aerospace Applications [PDF]
In order to improve the ability of the phase-locked loop (PLL) microsystem applied in the aerospace environment to suppress the irradiation effect, this study presents an efficient charge pump hardened scheme by using the radiation-hardened-by-design ...
Qi Xiang, Hongxia Liu, Yulun Zhou
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Extremely Coherent Microwave Emission from Spin Torque Oscillator Stabilized by Phase Locked Loop. [PDF]
Spin torque oscillator (STO) has been attracting a great deal of attention as a candidate for the next generation microwave signal sources for various modern electronics systems since its advent.
Tamaru S +4 more
europepmc +2 more sources
Phase-locked loop for precisely timed acoustic stimulation during sleep. [PDF]
Santostasi G +6 more
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Displacement measuring interferometer for sub-nano meter resolution
In this presentation, the displacement measurement system using sinusoidal phase modulation interferometer and modified phase-locked loop is discussed.
Masato Higuchi +2 more
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Analysis and improvement of fourth‐order generalised integrator based phase‐locked loop
The fourth‐order generalised integrator is very suitable for single‐phase phase‐locked loop because it can provide orthogonal signal conveniently and block harmonic voltages effectively. In the conventional fourth‐order generalised integrator based phase‐
Jinbo Li +4 more
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A stabiliser is designed based on the phase compensation method to suppress the instability of wind‐turbine type‐4 in the low frequency mode [direct current voltage loop mode and phase‐locked loop mode].
Jili Peng +4 more
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Design and Experimentation of a Single-Phase PLL With Novel OSG Method
Different phase-locked loop algorithms applied to three-phase grid voltages implement a closed control loop based on the Park transform to obtain the grid voltage instantaneous phase and frequency.
Manuele Bertoluzzo +2 more
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Design and verification of data acquisition clock circuit based on dual-loop phase-locked loop
Background Digital measurement system based on ADCs (analog-to-digital converter) has higher requirement on the signal to noise ratio (SNR) of sampled data. Among all the factors, the jitter of sampling clock has the most prominent effect on SNR.
LIU Zhi +11 more
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Different from the conventional grid voltage feedforward, the capacitive voltage type full feedforward will not amplify high frequency harmonics, and it can eliminate the capacitor current control and simplify the controller design.
Ying Li +4 more
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Low Power Clock Generator Design With CMOS Signaling
The requirements for computing with higher energy efficiency in the datacenter and for longer battery life in laptop computers, cell phones, and other IoT devices while increasing performance with higher frequency and more cores, drive the needs for more
Yongping Fan, Ian A. Young
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