Calculating area of fractional-order memristor pinched hysteresis loop
The Journal of Engineering, 2015 A fractional-order current-controlled memristor pinched hysteresis loop area is calculated in this study. The area is divided into two parts: one equals to the half of instantaneous power and the other is the part memory of the memristor.
Ya-Juan Yu +3 more
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Recording and modeling of pinched hysteresis loops, the fingerprint of a memristor, in neurons [PDF]
Scientific ReportsA variant of the Hodgkin-Huxley model has been proposed in which time-varying Na+ and K+ ion conductances are replaced by memristors, based on the proposal that ion channels are memristors.
Oliver Pabst +5 more
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Pinched hysteresis loops in non‐linear resonators [PDF]
IET Circuits, Devices and Systems, 2021 This study shows that pinched hysteresis can be observed in simple non‐linear resonance circuits containing a single diode that behaves as a voltage‐controlled switch. Mathematical models are derived and numerically validated for both series and parallel
Ahmed S. Elwakil +3 more
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All Pinched Hysteresis Loops Generated by (α, β) Elements: in What Coordinates They May be Observable [PDF]
IEEE Access, 2020 Two existing theorems for studying pinched hysteresis loops generated by nonlinear higher-order elements from Chua's table are reformulated, namely the generalized homothety theorem and the associated Loop Location Rule, specifying the coordinates where ...
Zdenek Biolek +3 more
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CMOS Realization of All-Positive Pinched Hysteresis Loops [PDF]
Complexity, 2017 Two novel nonlinear circuits that exhibit an all-positive pinched hysteresis loop are proposed. These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections.
B. J. Maundy +2 more
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Comments on Pinched Hysteresis Loops of Memristive Elements [PDF]
Radioengineering, 2015 The hysteresis loops pinched in the v-i origin belong to well-known fingerprints of memristive elements driven by bipolar periodical signals. Some element properties follow from the loop behavior in the close neighborhood of the origin.
Z. Biolek +3 more
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Graphical modelling of pinched hysteresis loops of memristors [PDF]
IET Science, Measurement and Technology, 2017 In this study, a graphical modelling approach of the pinched hysteresis loops exhibited by memristors is presented. This method provides a tool to emulate the hysteresis loop pinched at the origin, with the lobe area varying with the excitation frequency. The direction of the pinched hysteresis loop can be controlled.
Xiao−Meng Wang, S Y R Hui
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A DTMOS-Based Memristor Emulator Circuit for Low-Power Biomedical Signal Conditioning [PDF]
MicromachinesThis paper presents a novel, minimalist floating memristor emulator circuit designed for low-power biomedical analog front ends. The proposed topology requires only two dynamic threshold MOS (DTMOS) transistors and one capacitor, constituting one of the ...
Imen Barraj
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Interpreting area of pinched memristor hysteresis loop
Electronics Letters, 2014 It is shown that the area of the pinched hysteresis loop of the current‐controlled ideal memristor represents the quantity ‘content’, which was introduced into the theory of nonlinear systems by Millar in 1951. Two parts of the content are identified which correspond to distinct parts of the area below the v–i
Dalibor Biolek
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Memristor Emulator Circuits: Recent Advances in Design Methodologies, Healthcare Applications, and Future Prospects [PDF]
MicromachinesMemristors, as the fourth fundamental circuit element, have attracted significant interest for their potential in analog signal processing, computing, and memory storage technologies.
Amel Neifar +3 more
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