Results 161 to 170 of about 585 (189)

How Can the Hysteresis Loop of the Ideal Memristor Be Pinched?

IEEE Transactions on Circuits and Systems II: Express Briefs, 2014
The hysteresis loop pinched at the origin of the v-i characteristic is the well-known fingerprint of the memristor excited by sinusoidal signal. This brief generalizes the present knowledge of the parameters of the pinched hysteresis loop for a periodical zero-dc driving signal described by an odd function of time.
Zdenek Biolek, Dalibor Biolek
exaly   +2 more sources

Computation of Pinched Hysteresis Loop Area From Memristance-vs-State Map

IEEE Transactions on Circuits and Systems II: Express Briefs, 2019
The voltage-current characteristic of memristor driven by sinusoidal signal has the shape of hysteresis loop pinched at the origin. The lobe area of the hysteresis loop has been computed so far either from the voltage-current plane for all types of memristors or from the constitutive relation in the flux-charge plane of ideal memristor.
Anamarija Juhas, Staniŝa Dautovic
exaly   +2 more sources

Memristor pinched hysteresis loops: Touching points, Part II

2014 International Conference on Applied Electronics, 2014
Crossing-type and non-crossing-type touching points of higher orders of a pair of arms of memristor pinched hysteresis loop are analyzed. Mathematical conditions of the occurrence of these points are derived for ideal voltage-controlled memristor driven by the sinusoidal voltage.
Dalibor Biolek, Viera Biolkova, Zdenek Kolka   +2 more
exaly   +2 more sources

Correlation Between the Theory of Lissajous Figures and the Generation of Pinched Hysteresis Loops in Nonlinear Circuits

IEEE Transactions on Circuits and Systems I: Regular Papers, 2019
In this paper, the application of the theory of Lissajous figures to the creation of pinched hysteresis loops, considered to be a characteristic of memristive systems, is demonstrated and experimentally verified using designed electronic circuits in the form of an input impedance.
Brent Maundy, Ahmed S Elwakil, Costas Psychalinos   +2 more
exaly   +2 more sources

Characters of Pinched Hysteresis Loops for Memristors

Journal of Computational and Theoretical Nanoscience, 2016
Junwei Sun, Guangzhao Cui, Yanfeng Wang   +2 more
exaly   +2 more sources

Area of Pinched Hysteresis Loops for Current-Controlled Memristor and Voltage-Controlled Memristor

Journal of Computational and Theoretical Nanoscience, 2015
Junwei Sun, Jincheng Li, Yanfeng Wang
exaly   +2 more sources

A Multistable Generalized Meminductor with Coexisting Stable Pinched Hysteresis Loops

International Journal of Bifurcation and Chaos, 2020
A multistable local active meminductor emulator is proposed in this paper. The mathematical model of the emulator circuits is established. Different periodic stimuli are applied to the presented emulators and coexisting stable pinched hysteresis loops are obtained. The results obtained by experimental equips are consistent with the theoretical analysis,
Fang Yuan, Yue Deng 0007, Yuxia Li
openaire   +1 more source

Locally Active Memristor with Three Coexisting Pinched Hysteresis Loops and Its Emulator Circuit

International Journal of Bifurcation and Chaos, 2020
Locally active memristors with multiple coexisting pinched hysteresis loops have attracted the attention of researchers. However, the currently reported multiple coexisting pinched hysteresis loops memristors are obtained by adding additional piecewise-linear terms into the original Chua corsage memristor.
Minghao Zhu, Chunhua Wang 0001, Quanli Deng, Qinghui Hong   +3 more
openaire   +2 more sources

Behavioral Modeling of the Pinched Hysteresis Loop of a Pt/TiO₂/Pt Memristor

International Journal of High Speed Electronics and Systems, 2023
The fourth fundamental circuit element, the memristor, has become a promising candidate to substantially improve the energy and area efficiencies of circuits as traditional complementary metal-oxide-semiconductor (CMOS) technology is approaching its physical limit.
Aalvee Asad Kausani, Mehdi Anwar
openaire   +1 more source

Pinched hysteresis loop and internal bias field in Ba4(La0.2Nd0.2Sm0.2Eu0.2Y0.2)2Ti4Nb6O30 tungsten bronze ceramics

Journal of Applied Physics, 2023
A-site high entropy Ba4(La0.2Nd0.2Sm0.2Eu0.2Y0.2)2Ti4Nb6O30 tungsten bronze ceramics were designed and prepared by a standard solid state sintering process. First-order ferroelectric transition occurs around 240 °C on heating, while around 136 °C on cooling.
Ying Wang, Xiao Li Zhu, Shu Ya Wu, Xiao Qiang Liu, Xiang Ming Chen   +4 more
openaire   +1 more source