Results 181 to 190 of about 658,048 (195)

Effects of pinching in the hysteresis loop of rack connections

2017
The non-linear behaviour of beam-column joints plays a fundamental role in the seismic response of frame structures. Experimental tests on rack connections have shown that their cyclic behaviour is characterized by the “pinching” phenomenon, that is a progressive deterioration of the rotational stiffness.
GUSELLA, FEDERICO, ORLANDO, MAURIZIO, VIGNOLI, ANDREA   +2 more
openaire   +1 more source

On-printed circuit board emulator with controllability of pinched hysteresis loop for nanoscale $$\mathrm{TiO}_2$$ TiO 2 thin-film memristor device

Journal of Computational Electronics, 2016
Since real memristor devices are still not commercially available to most researchers, modeling a memristor is an effective method to explore its properties. In this paper, a flux-controlled memristor emulator circuit that can correctly mimic the memristive behavior of a real nanoscale $$\mathrm{TiO}_2$$TiO2 thin-film memristor device is presented. The
Van Ha Nguyen, Keun Yong Sohn, Hanjung Song   +2 more
openaire   +1 more source

Ultra-slim pinched polarization-electric field hysteresis loops and thermally stable electrostrains in lead-free sodium bismuth titanate-based solid solutions

Journal of Alloys and Compounds, 2019
Abstract Electric field-induced strains (electrostrains) with high amplitude, high thermal stability and ultra-low hysteresis are of great interest both in fundamental researches and industrial applications, such as high-precision displacement actuators.
Li Jin, Jing Pang, Ruiyi Jing, Yu Lan, Liang Wang, Fei Li, Qingyuan Hu, Hongliang Du, Dong Guo, Xiaoyong Wei, Zhuo Xu, Leiyang Zhang, Gang Liu   +12 more
openaire   +1 more source

Pinched Hysteresis Loop Characteristics of a Fractional-Order HP $$\mathrm{TiO_2}$$ memristor

2017
A memristor is a nonlinear resistor with time memory. Usually, the memory without any loss is an ideal case. Recent studies show that there is a memory loss of the classic HP \(\mathrm{TiO_2}\) linear model, which has memory effect between no memory and ideal memory (complete memory). To describe the memory property, we propose a fractional-order HP \(\
Min Shi, Songlin Hu
openaire   +1 more source

Hysteresis Resonance and Multi-Pinched Hysteresis Loops in Cu/Cu:ZnO/Cu Resistive Switching Devices

IETE Journal of Research, 2023
P Michael Preetam Raj, Sravan K Vittapu, Sree Giri Prasad Beri   +2 more
openaire   +1 more source

Simulation of Pinched Hysteresis Loops of Two Memristor SPICE Models

Advances in Memristor Circuits and Bioinspired Systems, 2015
Akzharkyn Izbassarova, Daulet Kengesbek
openaire   +1 more source

Pinched – hysteresis loops of KSrNbO ferroelectric ceramics

Materials Science and Engineering B: Solid-State Materials for Advanced Technology, 2021
Liangliang Liu, Zhaoping Hou, Rui Lv
exaly  

All Pinched Hysteresis Loops Generated by (α, β) Elements: in What Coordinates They May be Observable

IEEE Access, 2020
Zdenek Kolka, Dalibor Biolek, Viera Biolková   +2 more
exaly  

Bilayer Lipid Membrane as Memcapacitance: Capacitance–Voltage Pinched Hysteresis and Negative Insertion Conductance

Membranes, 2023
Andrej A Anosov, Elena Smirnova
exaly  

Simple MOS-based circuit designed to show pinched hysteresis behavior

International Journal of Circuit Theory and Applications, 2018
Costas Psychalinos, Brent J Maundy, Ahmed S Elwakil   +2 more
exaly