On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line [PDF]
, 2003 This paper presents a CMOS 0,6μm mixed-signal MODEM ASIC for data transmission on the low-voltage power line. The circuit includes all the analog circuitry needed for input interfacing and modulation/demodulation (PLL-based frequency synthesis, slave ...
Domínguez Matas, Carlos +4 more
core +1 more source
Design-Oriented Transient Stability Analysis of PLL-Synchronized Voltage-Source Converters [PDF]
IEEE transactions on power electronics, 2018 Differing from synchronous generators, there are lack of physical laws governing the synchronization dynamics of voltage-source converters (VSCs). The widely used phase-locked loop (PLL) plays a critical role in maintaining the synchronism of current ...
Heng Wu, Xiongfei Wang
semanticscholar +1 more source
Processor PIC18F46K22 Applied as DTMF Generator
Advances in Electrical and Electronic Engineering, 2015 Submitted article describes an application of microcontroller PIC18F46K22 for generating DTMF (Dual Tone Multi-Frequency) signal. Used microcontroller is optimal for this application - it has timers with compare facilities, sufficient number of PWMs ...
Radek Novak
doaj +1 more source
IET Smart Grid, 2020 The large-scale penetration of electric vehicles (EVs) into the power system will provoke new challenges needed to be handled by distribution system operators (DSOs). Demand response (DR) strategies play a key role in facilitating the integration of each
İbrahim Şengör +5 more
doaj +1 more source
Frontiers in Nutrition, 2021 The dietary needs of humans for provitamin A carotenoids arise from their inability to synthesize vitamin A de novo. To improve the status of this essential micronutrient, special attention has been given to biofortification of staple foods, such as ...
Shu Yu, Li Tian
doaj +1 more source
Ultrasound array transmitter architecture with high timing resolution using embedded phase-locked loops [PDF]
, 2012 Coarse time quantization of delay profiles within ultrasound array systems can produce undesirable sidelobes in the radiated beam profile. The severity of these sidelobes is dependent upon the magnitude of phase quantization error - the deviation from ...
Cowell, DMJ +4 more
core +1 more source
Impedance-compensated grid synchronisation for extending the stability range of weak grids with voltage source converters [PDF]
, 2016 This paper demonstrates how the range of stable power transfer in weak grids with voltage source converters (VSCs) can be extended by modifying the grid synchronisation mechanism of a conventional synchronous reference frame phase locked loop (PLL).
D'Arco, Salvatore +3 more
core +2 more sources
Noncontact atomic force microscopy simulator with phase-locked-loop controlled frequency detection and excitation [PDF]
, 2006 A simulation of an atomic force microscope operating in the constant amplitude dynamic mode is described. The implementation mimics the electronics of a real setup including a digital phase-locked loop (PLL).
Adrian Wetzel +9 more
core +2 more sources
Grid-Synchronization Stability Analysis for Multi DFIGs Connected in Parallel to Weak AC Grids
Energies, 2019 Recent works have shown that phase-locked loop (PLL) synchronized wind turbines (WTs) suffer stability issues when integrated into weak grids. However, most of the current studies are limited to a single machine case, the interactions among the WTs are ...
Dong Wang +4 more
doaj +1 more source
Low-Jitter Clock Multiplication: a Comparioson between PLLs and DLLs [PDF]
, 2002 This paper shows that, for a given power budget, a practical phase-locked loop (PLL)-based clock multiplier generates less jitter than a delay-locked loop (DLL) equivalent. This is due to the fact that the delay cells in a PLL ring-oscillator can consume
Beek, Remco C.H. van de +3 more
core +2 more sources