Managing a reconfigurable processor in a general purpose workstation environment [PDF]
This dissertation considers the problems associated with using Field Programmable Logic (FPL) within a processor to accelerate applications in the context of a general purpose workstation, where this scarce resource will need to be shared fairly and ...
Dales, Michael Winston +2 more
core +10 more sources
Optimal Control Method of Semi-Active Suspension System and Processor-in-the-Loop Verification
This study presents an implementation of a proportional–integral–derivative (PID) controller utilizing particle swarm optimization (PSO) to enhance the compromise on road holding and ride comfort of a quarter car semi-active suspension system (SASS ...
Turgay Ergin, Meral Özarslan Yatak
doaj +3 more sources
Fast-forwarding with NISQ processors without feedback loop [PDF]
Abstract Simulating quantum dynamics is expected to be performed more easily on a quantum computer than on a classical computer. However, the currently available quantum devices lack the capability to implement fault-tolerant quantum algorithms for quantum simulation.
Kian Hwee Lim +3 more
openaire +3 more sources
Processor-In-Loop hardware setup.
Processor-In-Loop hardware setup.
Nik Rumzi Bin Nik Idris (12883823) +4 more
core +1 more source
Control speculation in multithreaded processors through dynamic loop detection [PDF]
This paper presents a mechanism to dynamically detect the loops that are executed in a program. This technique detects the beginning and the termination of the iterations and executions of the loops without compiler/user intervention. We propose to apply this dynamic loop detection to the speculation of multiple threads of control dynamically obtained ...
Tubella Murgadas, Jordi +1 more
openaire +2 more sources
A PSCAD PROCESSOR-IN-THE-LOOP SYSTEM FOR HARDWARE EVALUATION OF POWER CONVERTER CONTROL ALGORITHMS [PDF]
Hardware implementation of controllers for modular multilevel converter voltage source converters is a non-trivial task, which requires a thorough evaluation of the real-world performance of control hardware. This paper presents a new processor-in-the-loop system developed at The University of Manchester which enables real-time evaluation of power ...
Andrews, Jack +2 more
openaire +2 more sources
Methodology for the formal specification of RTL RISC processor designs (with particular reference to the ARM6) [PDF]
Due to the need to meet increasingly challenging objectives of increasing performance, reducing power consumption and reducing size, synchronous processor core designs have been increasing significantly in complexity for some time now.
Schostak, Daniel Paul
core +7 more sources
The aim of this work is the analysis, design and hardware implementation of the fractional-order point kinetics (FNPK) model along with its closed-loop controller. The stability and closed-loop control of FNPK models are critical issues.
Vishwesh A. Vyawahare +3 more
doaj +1 more source
Flat-sat facility for processor-in-the-loop verification and testing of nanosatellite ADCS
Small spacecraft missions are experiencing an increasing interest from the space community, because of their capability to reduce the cost of space access and of their potential to accomplish operations, complementary or even similar to larger monolithic spacecraft.
Colagrossi, A. +2 more
openaire +2 more sources
Modelling of Real Time Units in the Verification and Validation Process of Satellite Systems [PDF]
Verification and Validation (V&V) methodologies are essential to ensure the correct operations of control algorithms of the embedded software during a satellite mission.
Marius-Daniel MARINESCU +6 more
doaj +1 more source

