Results 291 to 297 of about 149,979,910 (297)

SUPERPIPELINED VLIW PROCESSOR ADDRESSING BYPASS-LOOP SPEED LIMITATION

2008
SLAVENBURG GERRIT, VAN DE WAERDT JAN-WILLEM   +1 more
openaire   +1 more source

Signal processor having feedback loop control for decision feedback equalizer

2003
SAWADA MASARU, TOMITA TSUYOSHI, NAKATA YOSHITAKA, MORIUCHI TSUNEHIKO, YAMAKURA KENICHI, TANISHIMA HIDEAKI, UEMATSU FUMIAKI, HORIBE KOJI, NAKANO MANABU   +8 more
openaire   +1 more source

Programmable phase locked loops for digital signal processors

G A Leonov
exaly  

Data processor with improved loop handling utilizing improved register allocation

1995
NAKAZAWA KISABURO, NAKAMURA HIROSHI, IMORI HIROMITSU, WADA HIDEO   +3 more
openaire   +1 more source

Enhancing the Performance of Parallel Processors: Experiments with Loop Constructs and Tiling.

David C. Wong 0002, Edward W. Davis, Michael H. Thomas   +2 more
openaire   +1 more source

Signal processor having feedback loop control for decision feedback equalizer

2006
SAWADA MASARU, MORIUCHI TSUNEHIKO
openaire   +1 more source

Processor-in-the-Loop (PIL) Tests of Embedded KalmanNet for Supercapacitor SOC Estimation

openaire   +1 more source