Results 11 to 20 of about 207,528 (316)
Proceedings of the 22nd annual international symposium on Computer architecture - ISCA '95, 1995 Multiscalar processors use a new, aggressive implementation paradigm for extracting large quantities of instruction level parallelism from ordinary high level language programs. A single program is divided into a collection of tasks by a combination of software and hardware.
Gurindar S. Sohi +2 more
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Managing a reconfigurable processor in a general purpose workstation environment [PDF]
, 2003 This dissertation considers the problems associated with using Field Programmable Logic (FPL) within a processor to accelerate applications in the context of a general purpose workstation, where this scarce resource will need to be shared fairly and ...
Dales, Michael Winston +2 more
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Processor-In-Loop hardware setup.
, 2022 Processor-In-Loop hardware setup.
Nik Rumzi Bin Nik Idris (12883823) +4 more
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Information Processing by Selective Machines
Proceedings, 2022 The goal of this paper is to develop the novel automaton model of learning processes called a selective machine and to study the properties of these machines.
Mark Burgin, Karthik Rajagopalan
doaj +1 more source
Non-contiguous processor allocation strategy for 2D mesh connected multicomputers based on sub-meshes available for allocation [PDF]
, 2006 Contiguous allocation of parallel jobs usually suffers from the degrading effects of fragmentation as it requires that the allocated processors be contiguous and has the same topology as the network topology connecting these processors. In non-contiguous
Ould-Khaoua, M. +7 more
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A Spiking Neural Network Model of the Lateral Geniculate Nucleus on the SpiNNaker Machine
Frontiers in Neuroscience, 2017 We present a spiking neural network model of the thalamic Lateral Geniculate Nucleus (LGN) developed on SpiNNaker, which is a state-of-the-art digital neuromorphic hardware built with very-low-power ARM processors.
Basabdatta Sen-Bhattacharya +7 more
doaj +1 more source
Mapping Packet Processing Applications on a Systolic Array Network Processor [PDF]
, 2008 Systolic array network processors represent an effective alternative to ASICs for the design of multi-gigabit packet switching and forwarding devices because of their flexibility, high aggregate throughput and deterministic worst-case performances ...
Rolando, Pierluigi, +16 more
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FPGA-based prototyping of IEEE 802.11a base band processor [PDF]
Serbian Journal of Electrical Engineering, 2004 In technical literature and especially in domestic, predominant way to examine performance of 802.11a-based systems are experiments in simulations. In this paper, we present FPGA based 802.11a prototype, which gave us a possibility to gain closer insight
Dramićanin Dejan M. +3 more
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CFD MODELING OF MICROCHANNELS COOLING FOR ELECTRONIC MICRODEVICES
International Islamic University Malaysia Engineering Journal, 2022 A simulation of the cooling of electronic devices was carried out by means of microchannels, using water as a coolant to dissipate the heat generated from a computer processor, and thus stabilize its optimum operating temperature.
Jonathan Fábregas +7 more
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Specialized processors and algorithms for computing standard functions [PDF]
E3S Web of Conferences, 2023 This article discusses the problem of creating a specialized processor device that allows you to increase the number of calculated mathematical functions, resulting in a single calculation scheme for all elementary functions, an algorithm for lowering ...
Turdimatov Mamirjon +4 more
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