Results 11 to 20 of about 285 (176)
A construction for girth‐8 QC‐LDPC codes using Golomb rulers
Electronics Letters, 2022 In this paper, an algebraic construction of regular QC‐LDPC codes by using the modular multiplication table mod P and Golomb rulers are proposed. It is proved that the proposed QC‐LDPC codes based on a Golomb ruler of length L have girth at least 8 if P ...
Inseon Kim, Hong‐Yeop Song
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On a class of column‐weight 3 decomposable LDPC codes with the analysis of elementary trapping sets
IET CommunicationsA column‐weight k LDPC code with the parity‐check matrix H is called decomposable if there exists a permutation π on the rows of H, such that π(H) can be decomposed into k column‐weight one matrix.
G. Raeisi, M. Gholami
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Area‐ and energy‐efficient high‐throughput QC‐LDPC encoder for space applications
Electronics Letters, Volume 59, Issue 23, December 2023., 2023 An area‐ and energy‐efficient encoding method and encoder architecture are proposed using a bit selector before bit XOR operations in vector–matrix multiplication. A fully parallel low‐density parity check encoder is implemented on the aiwan Semiconductor Manufacturing Company (TSMC) 90 nm complementary metal oxide semiconductor (CMOS) technology ...
Lintao Li, Jiayi Lv, Yimin Li
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Energies, 2023 The large number of inexpensive and energy-efficient terminals in IoT systems is one of the emerging elements of the recent landscape of information and communication technologies.
Jakub Hyla, Wojciech Sułek
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Journal of Electrical and Computer Engineering, Volume 2023, Issue 1, 2023., 2023 With the rapid development of 5G communication and wireless Internet of Things technology, the application of intelligent wearable devices based on wireless data transmission technology is becoming more and more popular. However, due to the bandwidth of wireless data transmission nodes and the power consumption of the device system, the use time and ...
Yaguang Yang +4 more
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Embedded Parallel Implementation of LDPC Decoder for Ultra‐Reliable Low‐Latency Communications
Applied Computational Intelligence and Soft Computing, Volume 2023, Issue 1, 2023., 2023 Ultra‐reliable low‐latency communications, URLLC, are designed for applications such as self‐driving cars and telesurgery requiring a response in milliseconds and are very sensitive to transmission errors. To match the computational complexity of LDPC decoding algorithms to URLLC applications on IoT devices having very limited computational resources ...
Mhammed Benhayoun +4 more
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Jointly designed quasi-cyclic LDPC-coded cooperation with diversity combining at receiver
International Journal of Distributed Sensor Networks, 2020 This correspondence proposes a jointly-designed quasi-cyclic (QC) low-density parity-check (LDPC)-coded multi-relay cooperation with a destination node realized by multiple receive antennas.
Muhammad Asif +5 more
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Performance analysis of LDPC coded GFDM systems
IET Communications, Volume 16, Issue 14, Page 1663-1673, August 2022., 2022 Abstract This paper analyzes the error probability performance of low‐density parity‐check (LDPC) coded generalized frequency division multiplexing (GFDM) systems over Rayleigh fading and additive white Gaussian noise (AWGN) channels. The initial log‐likelihood ratio (LLR) expressions used in the sum‐product algorithm (SPA) decoder are first derived ...
Yanpeng Wang, Paul Fortier
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Optimizing quasi-cyclic spatially coupled LDPC codes by eliminating harmful objects
EURASIP Journal on Wireless Communications and Networking, 2023 It is well known that some harmful objects in the Tanner graph of low-density parity-check (LDPC) codes have a negative impact on their error correction performance under iterative message-passing decoding.
Massimo Battaglioni +4 more
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DNN‐aided read‐voltage threshold optimization for MLC flash memory with finite block length
IET Communications, Volume 16, Issue 2, Page 120-130, January 2022., 2022 Abstract The error‐correcting performance of multi‐level‐cell (MLC) NAND flash memory is closely related to the block length of error‐correcting codes (ECCs) and log‐likelihood‐ratios of the read‐voltage thresholds. Driven by this issue, this paper optimizes the read‐voltage thresholds for MLC flash memory to improve the decoding performance of ECCs ...
Cheng Wang +6 more
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