Results 31 to 40 of about 1,775 (200)
An Efficient Construction Method for Quasi-Cyclic Low Density Parity Check Codes
In this paper, we propose an optimized belief propagation (OBP) based progressive edge-growth (PEG) method for constructing quasi-cyclic low density parity check (QC-LDPC) codes. In this proposed method, Tanner graphs are built by progressively appending
Yiming Lei, Mingke Dong
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Ldpc Code Construction using Randomly Permutated Copies of Parity Check Matrix [PDF]
A construction technique is proposed for low-density parity check (LDPC) codes. It uses a base parity check matrix designed from a ran-dom or constructed construction method as Gallager or Quasi-Cyclic LDPC (QC-LDPC) codes in sequence to get codes with ...
Amr lulu, Ammar Abu-Hudrouss
doaj +1 more source
4-CYCLE FREE APM LDPC CODES WITH AN EXPLICIT CONSTRUCTION [PDF]
Recently, a class of low-density parity-check codes based on affine permutation matrices, called APM-LDPC codes, have been considered which have some advantages than quasi-cyclic (QC) LDPC codes in terms of minimum-distance, cycle distribution, and error-
Z. Gholami, M. Gholami
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Tanner
Girth plays an important role in the design of low-density parity-check (LDPC) codes. Motivated by the works on the girth of some classes of Tanner quasi-cyclic (QC) LDPC codes, e.g., Tanner (3, 5), (3, 7), (3, 11), and (5, 7) codes, we, in this paper ...
Hengzhou Xu +4 more
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Construction of multiple-rate QC-LDPC codes using hierarchical row-splitting [PDF]
In this letter, we propose an improved method called hierarchical row-splitting with edge variation for designing multiple-rate quasi-cyclic low-density parity-check (QC-LDPC) codes, which constructs lower-rate codes from a high-rate mother code by row ...
Wang, Qi, Wang, Zhaocheng, Zhao, Peiyao
core +1 more source
Analisis Kinerja Jaringan 5G dengan Pengkodean QC-LDPC dan Polar
ABSTRAK Jaringan 5G telah menjadi penanda penting dalam evolusi teknologi nirkabel yang menawarkan kecepatan dan kinerja yang luar biasa untuk memenuhi kebutuhan konektivitas yang semakin meningkat.
RENI DYAH WAHYUNINGRUM +3 more
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LDPC Decoder of High Speed Multi-Rate DVB-S2 Based on FPGA
A multi-rate LDPC decoder architecture for DVB-S2 codes based on FPGA is proposed. Through elementary transformation on the parity check matrices of DVB-S2 LDPC codes, a new matrix whose left is a QC sub-matrix and right is Transformation of Staircase ...
doaj +1 more source
Low Power QC-LDPC Decoder Based on Token Ring Architecture
The article presents an implementation of a low power Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) decoder in a Field Programmable Gate Array (FPGA) device. The proposed solution is oriented to a reduction in dynamic energy consumption.
Mateusz Kuc +2 more
doaj +1 more source
Quasi-Cyclic LDPC Codes based on Pre-Lifted Protographs
Quasi-cyclic low-density parity-check (QC-LDPC) codes based on protographs are of great interest to code designers because analysis and implementation are facilitated by the protograph structure and the use of circulant permutation matrices for ...
Costello Jr, Daniel J. +2 more
core +1 more source
A High Throughput H-QC LDPC Decoder
In this paper, design of a high throughput low-density parity-check (LDPC) decoder using overlapped message passing scheduling algorithm is presented. Regular hierarchical quasi-cyclic (H-QC) LDPC code is used in this design to provide good coding performance at long code length.
Yi-Hsing Chien, Mong-Kai Ku
openaire +1 more source

