Results 11 to 20 of about 652,796 (302)
Impact of NBTI on SRAM Read Stability and Design for Reliability [PDF]
7th International Symposium on Quality Electronic Design (ISQED'06), 2006 Negative Bias Temperature Instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious effects on transistor threshold voltage. The degradation of PMOS devices due to NBTI leads to reduced temporal performance in digital circuits.
Sanjay V. Kumar +2 more
openaire +2 more sources
Radiation-Hardened 16T SRAM Cell with Improved Read and Write Stability for Space Applications
Applied SciencesThe critical charge of sensitive nodes decreases as transistors scale down with the advancement of CMOS technology, making SRAM cells more susceptible to soft errors in the space industry.
Jong-Yeob Oh, Sung-Hun Jo
doaj +2 more sources
Performance and Stability Analysis of Built-In Self-Read and Write Assist 10T SRAM Cell
Active and Passive Electronic Components, 2023 This work presents the performance and stability analysis of the proposed built-in self-read and write assist 10T SRAM (BSRWA 10T) for better performance in terms of thermal stability and fast write access, which is suitable for military and aerospace ...
Chokkakula Ganesh, Fazal Noorbasha
doaj +2 more sources
Radiation Hardened Read-Stability and Speed Enhanced SRAM for Space Applications
Applied SciencesWith the advancement of CMOS technology, the susceptibility of SRAM to single node upset (SNU), double node upset (DNU), and multiple node upset (MNU) induced by radiation has increased.
Woo Chang Choi, Sung-Hun Jo
doaj +2 more sources
Design of 10T SRAM cell with improved read performance and expanded write margin
IET Circuits, Devices and Systems, 2021 The need of genuine processors operation improvement cultivates the necessity for reliable, low power and fast memories. Several challenges follow this improvement at lower technology nodes.
Ashish Sachdeva, V. K. Tomar
doaj +2 more sources
e-Prime: Advances in Electrical Engineering, Electronics and EnergyThe demand for enhancing the performance of reliable processors necessitates using dependable, energy-efficient, and high-speed memory. Multiple obstacles arise as a consequence of this enhancement at lower technological nodes.
M. Srinu +2 more
doaj +2 more sources
Ultra-low Power FinFET SRAM Cell with Improved Stability Suitable for Low Power Applications [PDF]
International Journal of Electronics and Telecommunications, 2019 In this paper, a new 11T SRAM cell using FinFET technology has been proposed, the basic component of the cell is the 6T SRAM cell with 4 NMOS access transistors to improve the stability and also makes it a dual port memory cell.
Shilpi Birla
doaj +1 more source
High-Density 1R/1W Dual-Port Spin-Transfer Torque MRAM
Micromachines, 2022 Spin-transfer torque magnetic random-access memory (STT-MRAM) has several desirable features, such as non-volatility, high integration density, and near-zero leakage power.
Yeongkyo Seo, Kon-Woo Kwon
doaj +1 more source
npj Biofilms and Microbiomes, 2021 New long read sequencing technologies offer huge potential for effective recovery of complete, closed genomes from complex microbial communities. Using long read data (ONT MinION) obtained from an ensemble of activated sludge enrichment bioreactors we ...
Krithika Arumugam +12 more
doaj +1 more source
Micromachines, 2021 Current-perpendicular-to-the-plane giant magnetoresistance (CPP-GMR) read sensors based on Heusler alloys are promising candidates for ultrahigh areal densities of magnetic data storage technology. In particular, the thickness of reader structures is one
Pirat Khunkitti +2 more
doaj +1 more source