Results 231 to 240 of about 104,038 (280)

The power of reconfiguration

Journal of Parallel and Distributed Computing, 1991
Abstract This paper examines the computational aspects of the reconfigurable network model. The computational power of the model is investigated under several network topologies and with several variants of the model assumed. In particular, it is shown that there are reconfigurable machines based on simple network topologies that are capable of ...
Yosi Ben-Asher, David Peleg, Rajiv Ramaswami, Assaf Schuster   +3 more
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A Reconfiguration Manager for Dynamically Reconfigurable Hardware

IEEE Design and Test of Computers, 2005
Dynamic reconfiguration has been a technology solution in search of the right problem to solve. Effective use of the technology requires new programming and task management models. This article describes an approach to dynamic reconfiguration that reduces reconfiguration latency to the point where dynamic multimedia applications can now exploit such ...
Javier Resano, Daniel Mozos, Diederik Verkest, Francky Catthoor   +3 more
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Dynamically reconfigurable NoC for reconfigurable MPSoC

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005., 2006
The performance of a multiprocessor system-on-chip (MPSoC) is not only dependent on the computational capabilities of on-chip processors but also depends on the communication medium connecting them. This has shifted the emphasis from computation to communication architectural design.
Balal Ahmad, Tughrul Arslan
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Reconfigurable Products and Their Means of Reconfiguration

Volume 1: 36th Design Automation Conference, Parts A and B, 2010
Reconfigurable systems are able to meet the increasingly diverse needs of consumers. A reconfigurable system is able to change its configuration repeatedly and reversibly to match the customer’s needs or the surrounding environment, allowing the system to meet multiple requirements.
Jillian Haldaman, Matthew B. Parkinson
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A reconfigurable future

Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798), 2004
There are a plethora of new emerging system applications for reconfigurable architectures. Interest in reconfigurability is steadily increasing and reconfigurability has evolved from basic programmable structures to include advanced architectural components including processors, DSP blocks and connectivity.
Phil Bishop, Chris Sullivan
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Trends in reconfigurable logic and reconfigurable computing

9th International Conference on Electronics, Circuits and Systems, 2003
The paper gives a survey on reconfigurable logic and reconfigurable computing technologies, and on recent R&D trends in these areas. The paper also points out the weaker aspects of recent developments and proposes new directions to follow, driven by technology progress, a growing variety of reconfigurable platforms, and, innovations in EDA.
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Evolvability and reconfigurability

Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921), 2005
Great achievements in the area of evolvable hardware have been reported in the last decade. Evolvable hardware comprises an evolutionary algorithm, such as a genetic algorithm, and a reconfigurable hardware, such as field programmable analog arrays and field programmable gate arrays.
Cristina Costa Santini, José F. M. do Amaral, Marco Aurélio Cavalcanti Pacheco, Ricardo Tanscheit   +3 more
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Design for reconfiguration

Proceedings of the 26th annual ACM international conference on Design of communication, 2008
The desktop computer has been part of our work-life for a while. Even so many work situations do not consist solely of work at the desktop. Many other artefacts are used in changing configurations with and around the computer. Most user interface design has failed to recognize this, and accordingly we are still stuck with the idea that new design ...
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Synthesis of efficiently reconfigurable datapaths for reconfigurable computing

2008 International Conference on Field-Programmable Technology, 2008
We present new approach to optimize circuits for dynamic reconfiguration in FPGAs. Within a high level synthesis tool we optimize the binding of operations to resources to achieve high re-use of resources and interconnect between different configurations.
Markus Rullmann, Renate Merker
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Array partitioning: a methodology for reconfigurability and reconfiguration problems

Proceedings 1988 IEEE International Conference on Computer Design: VLSI, 2003
An approach to array fault tolerance is presented. A parametric tool for reconfigurability detection and reconfiguration of arrays is introduced. The underlying methodology is based on a partitioning algorithm to determine reconfigurability. After reconfiguration a compaction algorithm is used to optimize results. The application of this methodology to
DISTANTE, FAUSTO, LOMBARDI F., SCIUTO, DONATELLA   +2 more
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