Results 31 to 40 of about 16,644 (266)
Analysis and Design of a Context Adaptable SAD/MSE Architecture
Design of flexible multimedia accelerators that can cater to multiple algorithms is being aggressively pursued in the media processors community. Such an approach is justified in the era of sub-45 nm technology where an increasingly dominating leakage ...
Arvind Sudarsanam +2 more
doaj +1 more source
The Si elegans platform targets the complete virtualization of the nematode Caenorhabditis elegans, and its environment. This paper presents a suite of unified web-based Graphical User Interfaces (GUIs) as the main user interaction point, and discusses ...
Gorka Epelde +10 more
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Neuromorphic Artificial Vision Systems Based on Reconfigurable Ion‐Modulated Memtransistors
Conventional vision systems suffer from lots of data handling between memory and processing units. Inspired by how humans recognize noisy images and the flexible modulation on the timescale of ion dynamics inside an emerging memtransistor, a novel ...
Zhen Yang +6 more
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This introduction to the special section on Reconfigurable Computing briefly discusses the history and current state of the field and introduces the articles in the special section.
Walid A. Najjar, Paolo Ienne
openaire +3 more sources
Coarse‐grained (left) and atomistic (right) models of the shape memory polymer ESTANE ETE 75DT3 are shown schematically. The two representations bridge molecular detail and mesoscopic description. Both models capture shape memory behavior, linking segmental mobility and conformational relaxation of anisotropic chains to macroscopic recovery, and ...
Fathollah Varnik
wiley +1 more source
Data‐Driven Kinematic Modeling of Physical Origami Robots
Origami‐inspired structures facilitate the design of compliant and compact robots. However, physical origami robots possess inherent material compliance and mechanical imperfections, presenting challenges in modeling and redundant actuation for accurate ...
Mustafa Mete +4 more
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Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC).
William V. Kritikos +4 more
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This study describes the design and implementation of a small printed ultra-wideband (UWB) antenna for smart electronic systems with on-demand adjustable notching properties.
Abir Zaidi +7 more
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A reconfigurable logic‐in‐memory cell composed of triple‐gated feedback field‐effect transistors implements multiple combinational logic functions within a single configuration. By utilizing program gates as dynamic input terminals, the proposed cell performs full adder, full subtractor, 2‐to‐1 multiplexer, and 4‐to‐2 encoder operations without ...
Minhyeok Seol +5 more
wiley +1 more source
Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays
Floating-gate (FG) transistors are a primary means of providing nonvolatile digital memory in standard CMOS processes, but they are also key enablers for large-scale programmable analog systems, as well.
Brandon Rumberg +4 more
doaj +1 more source

