Results 51 to 60 of about 280,223 (314)
MORA - an architecture and programming model for a resource efficient coarse grained reconfigurable processor [PDF]
, 2009 This paper presents an architecture and implementation details for MORA, a novel coarse grained reconfigurable processor for accelerating media processing applications. The MORA architecture involves a 2-D array of several such processors, to deliver low
Chalamalasetti, S.R. +3 more
core +1 more source
Reconfigurable Intelligent Surfaces vs. Relaying: Differences, Similarities, and Performance Comparison [PDF]
IEEE Open Journal of the Communications Society, 2019 Reconfigurable intelligent surfaces (RISs) have the potential of realizing the emerging concept of smart radio environments by leveraging the unique properties of metamaterials and large arrays of inexpensive antennas.
M. Di Renzo +14 more
semanticscholar +1 more source
Reduced-Precision Redundancy on FPGAs
International Journal of Reconfigurable Computing, 2011 Reduced-precision redundancy (RPR) has been shown to be a viable alternative to triple modular redundancy (TMR) for digital circuits. This paper builds on previous research by offering a detailed analysis of the implementation of RPR on FPGAs to improve ...
Brian Pratt +2 more
doaj +1 more source
A Hardware Filesystem Implementation with Multidisk Support
International Journal of Reconfigurable Computing, 2009 Modern High-End Computing systems frequently include FPGAs as compute accelerators. These programmable logic devices now support disk controller IP cores which offer the ability to introduce new, innovative functionalities that, previously, were not ...
Ashwin A. Mendon +2 more
doaj +1 more source
Exploring Graphics Processing Unit (GPU) Resource Sharing Efficiency for High Performance Computing
Computers, 2013 The increasing incorporation of Graphics Processing Units (GPUs) as accelerators has been one of the forefront High Performance Computing (HPC) trends and provides unprecedented performance; however, the prevalent adoption of the Single-Program Multiple ...
Teng Li +2 more
doaj +1 more source
Journal of Low Power Electronics and Applications, 2021 With nine-axis sensing systems in 5G smartphones, mobile power consumption has become increasingly important, and ultra-low-power (ULP) sensor circuits can decrease power consumption to tens of microwatts.
Chih-Hsuan Lin, Kuei-Ann Wen
doaj +1 more source
Reconfigurable supply chain: the X-network
International Journal of Production Research, 2020 Research on supply chain (SC) digitalization, resilience, sustainability and leagility has remarkably progressed, most of it focused on the individual contributions of these four major frameworks.
A. Dolgui, D. Ivanov, B. Sokolov
semanticscholar +1 more source
Reconfigurable neuromorphic memristor network for ultralow-power smart textile electronics
Nature Communications, 2022 Neuromorphic computing memristors are attractive to construct low-power- consumption electronic textiles due to the intrinsic interwoven architecture and promising applications in wearable electronics.
Tianyu Wang +15 more
semanticscholar +1 more source
Modeling and Architecture Design of Reconfigurable Intelligent Surfaces Using Scattering Parameter Network Analysis [PDF]
IEEE Transactions on Wireless Communications, 2020 Reconfigurable intelligent surfaces (RISs) are an emerging technology for future wireless communication. The vast majority of recent research on RIS has focused on system level optimizations.
Shanpu Shen, B. Clerckx, R. Murch
semanticscholar +1 more source
International Journal of Reconfigurable Computing, 2009 FPGA devices have emerged as a popular platform for the rapid prototyping of biological Spiking Neural Networks (SNNs) applications, offering the key requirement of reconfigurability.
Jim Harkin +5 more
doaj +1 more source