Results 11 to 20 of about 1,676,055 (234)

Reconfigurable optical arithmetic logic unit and its applications [PDF]

Nature Communications
The growing constraints of Moore’s Law have fundamentally impeded further advancement in the energy efficiency of conventional electronic integrated circuits.
Xudong Zhou, Mingrui Yuan, Huifu Xiao, Yongheng Jiang, Pu Zhang, Yonghui Tian   +5 more
doaj   +2 more sources

Design synthesis for dynamically reconfigurable logic systems [PDF]

Dynamic reconfiguration of logic circuits has been a research problem for over four decades. While applications using logic reconfiguration in practical scenarios have been demonstrated, the design of these systems has proved to be a difficult process ...
Vasilko, Milan
core   +10 more sources

Reconfigurable In-Sensor Computing Memristor for Olfactory SNN and Reservoir Hybrid Neuromorphic Computing [PDF]

Research
Traditional gas sensing systems are facing efficiency challenges due to physically separated von Neumann architectures, making the construction of in-sensor computing neuromorphic olfactory systems urgently needed for low-power and low-latency scenarios.
Lin Lu, Jinhao Zhang, Qingxin Chen, Jialin Meng, Yongjin Zou, Yilin Wang, Tianyu Wang   +6 more
doaj   +2 more sources

Femto-joule threshold reconfigurable all-optical nonlinear activators for picosecond pulsed optical neural networks [PDF]

Light: Science & Applications
Achieving optical computing with thousands of tera-operations per second per watt per square millimeter (TOPs/W/mm2) is the key to surpassing electrical computing.
Ruizhe Liu, Zijia Wang, Chuyu Zhong, Yan Chen, Boshu Sun, Jialing Jian, Hui Ma, Dawei Gao, Jianyi Yang, Lan Li, Kaihui Liu, Xiaoyong Hu, Hongtao Lin   +12 more
doaj   +2 more sources

An On-Demand Neuromorphic Vision System Enabled by a Multi-Paradigm Neuromorphic Device and Hierarchical Reconfigurability Designed from Device to System Level. [PDF]

Adv Sci (Weinh)
An on‐demand ultra‐reconfigurable intelligent vision system with hierarchical reconfigurability from device to system levels is demonstrated. Through co‐design of a multi‐paradigm device, reconfigurable circuits, and adaptive system architecture/algorithms, the system enables seamless switching among spiking, non‐spiking, neuromorphic imaging (NI), and
Jiang B, Xu J, Ran L, Feng X, Harrabi K, Li Y, Lin L, Zhou F.   +7 more
europepmc   +2 more sources

Timing verification of dynamically reconfigurable logic for Xilinx Virtex FPGA series [PDF]

, 2002
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standard hardware design and verification tools to the design of dynamically ...
Ian Robertson, David Robinson, Patrick Lysaght, Robertson, I., Lysaght, P., Irvine, J., James Irvine, Robinson, D.   +7 more
core   +4 more sources

Integration of Reconfigurable p-Bit and 1R Crossbar Array for Memristive Probabilistic Computing. [PDF]

Adv Sci (Weinh)
A memristive probabilistic computing system is demonstrated by integrating stochastic p‐bits based on volatile memristors with a 1R crossbar array encoding interaction weights. The system performs weighted‐sum operations across the array and updates p‐bits iteratively.
Soh K, Kim JE, Chun SY, Hwang SI, Kim BS, Lee YJ, Jang HW, Yoon JH.   +7 more
europepmc   +2 more sources

Fixed and reconfigurable multiband antennas [PDF]

, 2011
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel UniversityWith the current scenario of development of antennas in the wireless communication field, the need of compact multiband, multifunctional and cost effective ...
Abutarboush, Hattan F
core   +6 more sources

Reduced-Precision Redundancy on FPGAs

International Journal of Reconfigurable Computing, 2011
Reduced-precision redundancy (RPR) has been shown to be a viable alternative to triple modular redundancy (TMR) for digital circuits. This paper builds on previous research by offering a detailed analysis of the implementation of RPR on FPGAs to improve ...
Brian Pratt, Megan Fuller, Michael Wirthlin   +2 more
doaj   +1 more source

Analysis and Design of a Context Adaptable SAD/MSE Architecture

International Journal of Reconfigurable Computing, 2009
Design of flexible multimedia accelerators that can cater to multiple algorithms is being aggressively pursued in the media processors community. Such an approach is justified in the era of sub-45 nm technology where an increasingly dominating leakage ...
Arvind Sudarsanam, Aravind Dasu, Karthik Vaithianathan   +2 more
doaj   +1 more source