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RISC-V

The chip crisis in early 2020 clearly revealed how dependent German and European industry was on the supply chains for microelectronic components. Despite experts repeatedly emphasising the importance of microelectronics to Europe’s capacity for innovation, shortages occurred which threatened major industrial sectors.
Qusay F. Hassan, Assim Sagahyroon
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RISC-V Extension for Lightweight Cryptography

2020 23rd Euromicro Conference on Digital System Design (DSD), 2020
Lightweight Cryptography (LWC) is suitable for IoTs which require a high level of security while keeping a low complexity. Many lightweight cryptographic algorithms have been proposed to satisfy these requirements. But there is currently no emerging standard concerning the symmetric block ciphering, as every algorithm has its own advantage.
Etienne Tehrani   +3 more
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The Case for RISC-V in Space

2019
This paper presents preliminary position on the use of the novel, free and open RISC-V Instruction Set Architecture (ISA) for on-board electronics in space. The modular nature of this ISA, the availability of a rich software ecosystem, a rapidly growing community and a pool of open-source IP cores will allow Space Industry to spin-in developments from ...
Stefano Di Mascio   +4 more
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A Compiler Comparison in the RISC-V Ecosystem

2020 International Conference on Omni-layer Intelligent Systems (COINS), 2020
The GNU Compiler Collection (GCC) is the traditional compiler for most embedded systems, since it supports many different instruction set architectures (ISA) in its back-end. GCC has also been the first compiler that supported the RISC-V ISA. Since a while Clang/LLVM has gained more and more interest in the embedded software community. Recently, RISC-V
Mehrdad Poorhosseini   +2 more
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RISC-V2: A Scalable RISC-V Vector Processor

2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020
Machine learning adoption has seen a widespread bloom in recent years, with neural network implementations being at the forefront. In light of these developments, vector processors are currently experiencing a resurgence of interest, due to their inherent amenability to accelerate data-parallel algorithms required in machine learning environments.
Karyofyllis Patsidis   +3 more
openaire   +1 more source

High-Performance RISC-V Emulation

2020
RISC-V is an open ISA that has been calling the attention worldwide by its fast growth and adoption. It is already supported by GCC, Clang and the Linux Kernel. However, none of the currently available RISC-V emulators are capable of providing good, near-native, emulation performance.
Leandro Lupori   +2 more
openaire   +1 more source

Investigation of RISC-V

Programming and Computer Software, 2021
Vladimir A. Frolov   +2 more
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RISC-V Is Inevitable

2023 International Conference on IC Design and Technology (ICICDT), 2023
Sam Rogan, Yoshihito Kondo
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The Scale4Edge RISC-V Ecosystem

2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022
Wolfgang Ecker   +26 more
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Emoji shellcoding in RISC-V

2023 IEEE Security and Privacy Workshops (SPW), 2023
Hadrien Barral   +2 more
openaire   +1 more source

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