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Efficient Cryptography on the RISC-V Architecture
2019RISC-V is a promising free and open-source instruction set architecture. Most of the instruction set has been standardized and several hardware implementations are commercially available. In this paper we highlight features of RISC-V that are interesting for optimizing implementations of cryptographic primitives. We provide the first optimized assembly
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Embedded Virtualization on RISC-V with seL4
2023 IEEE 14th Annual Ubiquitous Computing, Electronics & Mobile Communication Conference (UEMCON), 2023Michael A. Doran, Nabeeh Kandalaft
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2022 IEEE 34th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2022
Jonathas Silveira +7 more
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Jonathas Silveira +7 more
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2021 15th International Conference on Advanced Computing and Applications (ACOMP), 2021
Dai-Duong Tran +3 more
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Dai-Duong Tran +3 more
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Maxpool operator for RISC-V processor
2023 25th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC), 2023Dávid Nevezi-Strango +3 more
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Hardware Accelerated FrodoKEM on RISC-V
2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2022Patrick Karl, Tim Fritzmann, Georg Sigl
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RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures
Electronics (Switzerland), 2022Andrea Coluccio +2 more
exaly