Results 261 to 270 of about 21,625 (285)

The Case for RISC-V in Space

2019
This paper presents preliminary position on the use of the novel, free and open RISC-V Instruction Set Architecture (ISA) for on-board electronics in space. The modular nature of this ISA, the availability of a rich software ecosystem, a rapidly growing community and a pool of open-source IP cores will allow Space Industry to spin-in developments from ...
Stefano Di Mascio, Alessandra Menicucci, Gianluca Furano, Claudio Monteleone &, Marco Ottavi   +4 more
openaire   +2 more sources

Will RISC-V revolutionize computing?

Communications of the ACM, 2020
The open instruction set for microprocessors promises to reshape computing and introduce new, more powerful capabilities.
openaire   +1 more source

Information Flow Tracking in RISC-V [PDF]

2019 IEEE 16th International Conference on Smart Cities: Improving Quality of Life Using ICT & IoT and AI (HONET-ICT), 2019
In the process of globalization, heterogeneous SoCs play an important role in an embedded application, security aspects of such systems are crucial. The system is susceptible to many attacks out of which we focus on the run-time software attacks which causes memory corruption.
Fareena Saqib, Geraldine Shirley
openaire   +1 more source

RISC-V Extension for Lightweight Cryptography

2020 23rd Euromicro Conference on Digital System Design (DSD), 2020
Lightweight Cryptography (LWC) is suitable for IoTs which require a high level of security while keeping a low complexity. Many lightweight cryptographic algorithms have been proposed to satisfy these requirements. But there is currently no emerging standard concerning the symmetric block ciphering, as every algorithm has its own advantage.
Etienne Tehrani, Tarik Graba, Abdelmalek Si Merabet, Jean-Luc Danger   +3 more
openaire   +2 more sources

A Compiler Comparison in the RISC-V Ecosystem

2020 International Conference on Omni-layer Intelligent Systems (COINS), 2020
The GNU Compiler Collection (GCC) is the traditional compiler for most embedded systems, since it supports many different instruction set architectures (ISA) in its back-end. GCC has also been the first compiler that supported the RISC-V ISA. Since a while Clang/LLVM has gained more and more interest in the embedded software community. Recently, RISC-V
Wolfgang Nebel, Mehrdad Poorhosseini, Kim Grüttner   +2 more
openaire   +2 more sources

The Scale4Edge RISC-V Ecosystem

2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022
Ecker, Wolfgang, Adelt, Peer, Müller, Wolfgang, Heckmann, Reinhold, Kristic, Milos, Herdt, Vladimir, Drechsler, Rolf, Angst, Gerhard, Wimmer, Ralf, Mauderer, Andreas, Stahl, Rafael, Emrich, Karsten, Müller-Gritschneder, Daniel, Becker, Bernd, Scholl, Philipp, Jentzsch, Eyck, Schlamelcher, Jan, Grüttner, Kim, Palomero Bernardo, Paul, Bringmann, Oliver, Damian, Mihaela, Oppermann, Julian, Koch, Andreas, Bormann, Jörg, Partzsch, Johannes, Mayr, Christian, Kunz, Wolfgang   +26 more
openaire   +2 more sources

Procesador RISC-V segmentado

2023
Este proyecto de fin de grado consiste en el diseño e implementación de un procesador basado en la arquitectura libre RISC-V en una FPGA de Amd-Xilinx desde cero, es decir, sin utilizar ninguna clase de bloque IP ni código externo, aplicando la técnica de segmentación para aumentar las prestaciones del mismo.
openaire   +1 more source

High-Performance RISC-V Emulation

2020
RISC-V is an open ISA that has been calling the attention worldwide by its fast growth and adoption. It is already supported by GCC, Clang and the Linux Kernel. However, none of the currently available RISC-V emulators are capable of providing good, near-native, emulation performance.
Vanderson Martins do Rosario, Edson Borin, Leandro Lupori   +2 more
openaire   +2 more sources

Efficient Cryptography on the RISC-V Architecture

2019
RISC-V is a promising free and open-source instruction set architecture. Most of the instruction set has been standardized and several hardware implementations are commercially available. In this paper we highlight features of RISC-V that are interesting for optimizing implementations of cryptographic primitives. We provide the first optimized assembly
openaire   +3 more sources

Confidential Computing on RISC-V

Getting confidential computing right is a tough challenge. Other architectures already tried in the past to introduce mechanisms for providing confidentiality guarantees, and in many cases failed. On RISC-V the Confidential Computing SIG, under the Security HC, is working on two specifications for providing confidentiality guarantees for VMs/TEEs and ...
openaire   +1 more source