Results 261 to 270 of about 22,912 (307)

The tryptophan-binding pockets of Arabidopsis AGO1 facilitate amplified RNA interference via SGS3

López-Márquez D, Arribas-Hernández L, Poulsen C, Oksbjerg ED, Bouteiller N, Meier M, Blanke J, del Espino A, Vigh ML, Bressendorff S, Carbonell A, Daucke R, Schoof EM, Vaucheret H, Brodersen P.   +14 more
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Integration and evaluation of Triton with OmpSs-2 and RISC-V CPUs

Alejandro Aguirre López
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RISC-V²: A Scalable RISC-V Vector Processor

2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020
Machine learning adoption has seen a widespread bloom in recent years, with neural network implementations being at the forefront. In light of these developments, vector processors are currently experiencing a resurgence of interest, due to their inherent amenability to accelerate data-parallel algorithms required in machine learning environments.
Kariofyllis Patsidis, Chrysostomos Nicopoulos, Georgios Ch. Sirakoulis, Giorgos Dimitrakopoulos   +3 more
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RISC-V Online Tutor

2021
This paper presents the RISC-V Online Tutor course which provides structured, self-paced RISC-V architecture and applications training. The course browser transparently interacts with remote RISC-V hardware, implemented on an FPGA array. The course is implemented and supported by the reported vicilogic platform which provides online learning, remote ...
Fearghal Morgan, Arthur Beretta, Ian Gallivan, Joseph Clancy, Frédéric Rousseau, Roshan George, László Bakó, Frank Callaly   +7 more
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Accelerated RISC-V for SIKE

2021 IEEE 28th Symposium on Computer Arithmetic (ARITH), 2021
Software implementations of cryptographic algorithms are slow but highly flexible and relatively easy to implement. On the other hand, hardware implementations are usually faster but provide little flexibility and require a lot of time to implement efficiently.
Rami Elkhatib, Reza Azarderakhsh, Mehran Mozaffari-Kermani   +2 more
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Will RISC-V revolutionize computing?

Communications of the ACM, 2020
The open instruction set for microprocessors promises to reshape computing and introduce new, more powerful capabilities.
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High-Performance RISC-V Emulation

2020
RISC-V is an open ISA that has been calling the attention worldwide by its fast growth and adoption. It is already supported by GCC, Clang and the Linux Kernel. However, none of the currently available RISC-V emulators are capable of providing good, near-native, emulation performance.
Leandro Lupori, Vanderson Martins do Rosario, Edson Borin   +2 more
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Intel Discontinues RISC-V Programme

New Electronics, 2023
Intel ends its RISC-V Pathfinder development kit programme
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Procesador RISC-V segmentado

2023
Este proyecto de fin de grado consiste en el diseño e implementación de un procesador basado en la arquitectura libre RISC-V en una FPGA de Amd-Xilinx desde cero, es decir, sin utilizar ninguna clase de bloque IP ni código externo, aplicando la técnica de segmentación para aumentar las prestaciones del mismo.
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