Results 81 to 90 of about 13,809 (235)
A New Strategy to Design Reconfigurable Rivest–Shamir–Adleman (RSA) Accelerators
A reconfigurable FPGA‐based RSA accelerator is proposed using compression‐based modular multipliers combined with pseudomoduli arithmetic. The approach maps modular exponentiation to low‐cost arithmetic domains and applies a correction stage, achieving significant improvements in delay, operating frequency, and delay–area efficiency compared with ...
Augusto C. B. Vassoler +4 more
wiley +1 more source
Spike-RISC: Algorithm/ISA Co-Optimization for Efficient SNNs on RISC-V
Artificial intelligence has proven its benefits in many domains. Yet, traditional deep learning models are still too energy and compute-intensive for resource-constrained edge environments.
Ipek Akdeniz +3 more
doaj +1 more source
A Heterogeneous RISC-V Processor for Efficient DNN Application in Smart Sensing System. [PDF]
Zhang H +7 more
europepmc +1 more source
ABSTRACT Objective Eating disorders (EDs) often emerge in adolescence, but developmental trajectories across different core features remain largely unclear. Method The prospective, community‐based study included N = 898 participants aged 9.5–17.5 years (47.6% female, age 11.8 ± 1.4 years) with annual follow‐up over 2–6 (3.4 ± 1.2) years.
Anja Hilbert +5 more
wiley +1 more source
Deploying deep neural networks (DNNs) on resource-constrained IoT devices remains a challenging problem, often requiring hardware modifications tailored to individual AI models.
M. Ajay Kumar +7 more
doaj +1 more source
A blue‐hazard‐free single‐emissive‐layer white OLED is realized using an anti‐quenching multiple‐resonance TADF emitter, BNCT. By integrating a sterically protected MR core with efficient energy transfer capability, BNCT enables warm‐white emission with high efficiency, negligible hazardous blue photons, and a simplified device architecture for next ...
Xiao‐Long Liu +9 more
wiley +1 more source
An Educational RISC-V-Based 16-Bit Processor
This work introduces a novel custom-designed 16-bit RISC-V processor, intended for educational purposes and for use in low-resource equipment. The implementation, despite providing registers of 16 bits, is based on RV32E RISC-V ISA, but with some key ...
Jecel Mattos de Assumpção +3 more
doaj +1 more source
Two exciplex emitters are constructed based on a host‐guest doping strategy, and their exciton dynamics processes are investigated in depth. High‐performance OLEDs are fabricated by employing these exciplexes as emitters or sensitizers, providing excellent electroluminescence efficiencies and low efficiency roll‐offs.
Jingwen Xu +4 more
wiley +1 more source
A trade‐off between efficiency and stability in a class of sky‐blue organic light‐emitting diodes
OLED efficiency and stability are correlated with device structure using combined experimental and simulation approach. Efficient, but less stable devices suffer mainly from exciton‐exciton annihilation, while their opposites have excitons predominantly quenched by polarons.
Eglė Tankelevičiūtė +4 more
wiley +1 more source
A “gemstone‐necklace” FASCE strategy synthesizes single‐component white polymers (PTF‐Qx) by alternating rigid TADF units with flexible alkyl chains. The non‐doped rigid device achieves a high EQE of 15.66% with stable white emission (CIE: 0.36, 0.46).
Wenhao Zhang +7 more
wiley +1 more source

