Results 1 to 10 of about 19,913 (253)

Frequency Stability Support of a DFIG to Improve the Settling Frequency [PDF]

open access: yesIEEE Access, 2020
To ensure the frequency stability of a power grid, the settling frequency following a frequency event should be stabilized within the maximum steady-state frequency deviation (SSFD) band.
Jae Ik Yoo   +4 more
doaj   +4 more sources

Fast Frequency Support From Wind Turbine Systems by Arresting Frequency Nadir Close to Settling Frequency [PDF]

open access: yesIEEE Open Access Journal of Power and Energy, 2020
The recent power cut incident in the UK on 9th August 2019 indicated that frequency control to raise frequency nadir and eliminate frequency second dip is highly desirable for power grids with high penetration of wind energy.
Xianxian Zhao, Ying Xue, Xiao-Ping Zhang
doaj   +2 more sources

Quantum-driven frequency stability in Indian prospect smart grid with electric vehicle charging station integration and real-time hardware validation [PDF]

open access: yesScientific Reports
In India, the growth of the Electric Vehicle(EV) is gradually increasing due to the high price of fossil fuel and global warming. But in India, the Electric Vehicle Charging Station(EVCS) infrastructure is inadequate due to the limited number of charging
M. Kaleeswari, P. Sivakumar, A. Aswini
doaj   +2 more sources

Primary Frequency Stability Support of a DFIG in Association With Pitch Angle Control

open access: yesFrontiers in Energy Research, 2022
For an electric power grid that has large penetration levels of variable renewable energy including wind generation and photovoltaics, the system frequency stability is jeopardized, which is manifest in lowering frequency nadir and settling frequency ...
Xiuli Si   +5 more
doaj   +1 more source

An Enhanced Frequency Response Strategy of a DFIG Based on Over-Speed De-Loaded Curve

open access: yesApplied Sciences, 2021
The increasing level of wind power penetration is seriously threatening the frequency stability of the power system. In this article, we suggest an enhanced frequency response strategy of a doubly fed induction generator (DFIG) based on over-speed de ...
Yien Xu, Hongmei Wang, Dejian Yang
doaj   +1 more source

Analysis and Implementation of a Frequency Synthesizer Based on Dual Phase-Locked Loops in Cesium Atomic Clock

open access: yesApplied Sciences, 2023
The frequency synthesizer plays a crucial role in atomic clock technology. In this study, we demonstrate a direct microwave frequency synthesizer for a cesium atomic clock, employing frequency multiplication and a dual-phase-locked loop mode.
Guangkun Guo   +5 more
doaj   +1 more source

Design and realization of a broadband single-side-band mixer with a very short settling time [PDF]

open access: yesAdvances in Radio Science, 2010
To achieve high range resolution in synthetic aperture radar imaging a frequency synthesizer with high bandwidth is a possible solution. To operate in the required frequency band an LF-signal usually has to be upconverted.
S. Haßler, T. Reichthalhammer, E. Biebl
doaj   +1 more source

Dataset on rheological measurements of xanthan gum aqueous dispersions containing sodium chloride and settling dynamics of spheres and disks in these dispersions

open access: yesData in Brief, 2023
This paper presents a dataset collected in laboratory experiments on the settling of solid spheres and disks in shear-thinning and viscoelastic aqueous solutions of xanthan gum with sodium chloride addition.
Magdalena M. Mrokowska   +1 more
doaj   +1 more source

Load Frequency Control Using Golden Eagle Optimization for Multi-Area Power System Connected Through AC/HVDC Transmission and Supported With Hybrid Energy Storage Devices

open access: yesIEEE Access, 2023
The reliability of a power system depends on its ability to handle fluctuations and varying load demands, as uncontrolled frequency deviations can lead to load-shedding and blackouts.
Irfan Ahmed Khan   +7 more
doaj   +1 more source

A 0.9 V wideband SPLL with an adaptive fast‐locking circuit achieving 24.68 µs settling time reduction

open access: yesElectronics Letters, 2023
A low‐power wideband self‐biased phase‐locked loop (SPLL) is proposed for multi‐protocol SerDes applications in this letter. With the proposed adaptive fast‐locking current circuit (AFLCC) and self‐biased charge pump (CP), the settling time is reduced ...
Binghui Wang, Zhou Shu, Haigang Yang
doaj   +1 more source

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