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A cross-dataset harmonized intrusion detection framework with statistically validated multi-model learning. [PDF]
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An FPGA Based SHA-256 Processor
2002The design, implementation and system level performance of an efficient yet compact field programmable gate array (FPGA) based Secure Hash Algorithm 256 (SHA-256) processor is presented. On a Xilinx Virtex XCV300E-8 FPGA, the SHA-256 processor utilizes 1261 slices and has a throughput of 87 MB/s at 88 MHz.
Kurt K. Ting +3 more
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A Configurable Implementation of the SHA-256 Hash Function
2019This paper proposes a hardware solution for the SHA-256 hash function offering a number of configurable architecture-level features. This flexibility allows for exploring various trade-offs between performance, area occupation, and power consumption. As confirmed by the experimental results, the approach succeeds in exposing the effects of different ...
Martino, Raffaele, Cilardo, Alessandro
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A High-Throughput Hardware Implementation of SHA-256 Algorithm
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020The SHA-256 algorithm is widely used in the field of security. In this paper, we propose a rescheduling method for the SHA-256 round computation. Based on the proposed rescheduling, we propose a design for SHA-256, in which the critical path is reduced. Our design is implemented on the Xilinx Virtex-4 FPGA.
Yimeng Chen, Shuguo Li
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An optimized pipelined architecture of SHA-256 hash function
2017 7th International Symposium on Embedded Computing and System Design (ISED), 2017Real time applications of digital communication systems are rapidly increasing. Due to this there is a huge demand for high level of security. In cryptographic algorithms, SHA-256 has become an integral part in many applications. A hardware implementation of the SHA-256 hash algorithm is physically separate from the main processor and hence, it has ...
Meelu Padhi, Ravindra Chaudhari
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Multiple Hashing Using SHA-256 and MD5
2021Message Digest 5 (MD5) is a hashing function with numerous vulnerabilities such as pre-image vulnerability and collision vulnerability which restrict the usage of MD5. Therefore, by using other hashing functions such as SHA prior to hashing with MD5, we can use MD5 for various applications such as data integrity without compromising the security of the
Gautham P. Reddy +4 more
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Designing a SHA-256 processor for blockchain-based IoT applications
Internet of Things, 2020Abstract An increasing number of Internet of Things applications have been recently considering the use of the blockchain technology, calling for dedicated computational capabilities of the underlying devices. This poses an inherent challenge in an application domain notoriously characterised by several, often stringent limitations in terms of ...
Martino, Raffaele, Cilardo, Alessandro
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Quantum Collision Attacks on Reduced SHA-256 and SHA-512
2021In this paper, we study dedicated quantum collision attacks on SHA-256 and SHA-512 for the first time. The attacks reach 38 and 39 steps, respectively, which significantly improve the classical attacks for 31 and 27 steps. Both attacks adopt the framework of the previous work that converts many semi-free-start collisions into a 2-block collision, and ...
Akinori Hosoyamada, Yu Sasaki 0001
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VLSI implementation of high-speed SHA-256
2009 IEEE 8th International Conference on ASIC, 2009To accelerate the speed of iterative computation for the existing SHA-256 algorithm, using 7-3-2 array compressor is proposed to reduce the critical path delay in this paper. The frequency of the proposed scheme is 1.7 times higher than other VLSI implementations under the same process.
null Ling Bai, null Shuguo Li
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An optimized hardware implementation of SHA-256 round computation
The Computer JournalAbstract The SHA-256 algorithm is one of the most widely used secure hashing algorithms. The SHA-256 algorithm is implemented in hardware, and in order to ensure the integrity and authenticity of the encrypted data, this requires higher throughput and efficiency.
Maoqun Yao +3 more
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