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Lightweight Implementations of SHA-3 Candidates on FPGAs
2011The NIST competition for developing the new cryptographic hash algorithm SHA-3 has entered its third round. One evaluation criterion is the ability of the candidate algorithm to be implemented on resource-constrained platforms. This includes FPGAs for embedded and hand-held devices.
Jens-Peter Kaps +6 more
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Design Pipeline SHA-3 MIPS Processor using FPGA
Journal of Scientific Reports, 2023The purpose of this study is to implement and evaluate the security of the Keccak hash function in a Microprocessor without Interlocked Pipelines (MIPS) processor using Field Programmable Gate Arrays (FPGA). The design methodology involves selecting a set of instructions that are required to run the SHA-3 Keccak algorithm on the MIPS processor.
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SHA-3-LPHP: Hardware Acceleration of SHA-3 for Low-Power High-Performance Systems
2021 IEEE International Symposium on Software Reliability Engineering Workshops (ISSREW), 2021Yuta Akiya +6 more
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Performance analysis of SHA 2 and SHA 3
SSRN Electronic Journal, 2022Swati Sharma, Loveneet ., Saba Khanum
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ASIC implementations of five SHA-3 finalists
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012null Xu Guo +6 more
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Authentication System Based On Ldpc And Sha-3
2022 Sixth International Conference on I-SMAC (IoT in Social, Mobile, Analytics and Cloud) (I-SMAC), 2022Sheetal B V, A Rajagopal
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Side channel analysis of the SHA-3 finalists
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012M. Zohner +3 more
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