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Fast and Accurate Deep Neural Network (DNN) Model Extension Method for Signal Integrity (SI) Applications

2019 Electrical Design of Advanced Packaging and Systems (EDAPS), 2019
In this paper, we first propose a fast and accurate deep neural network (DNN) model extension method for signal integrity (SI) applications. Reusing pre-trained weights of DNN model, the model can be extended when new training data are given. Instead of updating whole weights of DNN in traditional machine learning (ML) approaches, fine-tuning of a part
Hyunwook Park   +11 more
openaire   +1 more source

Signal Integrity(SI) aware HBM2e/3 interposer design approach considering y-axis offset between logic and HBM die for HPC/AI/Network applications

2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 2021
This work demonstrates an efficient signal integrity (SI) aware routing design method considering system-level SI characteristics floor-planning for 2.5D interposer for the AI/HPC/Network solutions in early stage. The proposed method, system-level SI aware interposer design methodology (SSIDM) can accurately estimate the SI characteristics based on ...
Taeyun Kim, Chanmin Jo, Sungwook Moon
openaire   +1 more source

Advanced heterogeneous integration of InP HBT and CMOS Si technologies for high performance mixed signal applications

2009 IEEE MTT-S International Microwave Symposium Digest, 2009
Northrop Grumman Space Technology (NGST) is developing an Advanced Heterogeneous Integration (AHI) process to integrate III-V semiconductor chiplets on CMOS wafers under the Compound Semiconductor Materials on Silicon (COSMOS) DARPA program. The objective of the program is to have a heterogeneous interconnect pitch and length less than 5 um to enable ...
Augusto Gutierrez-Aitken   +14 more
openaire   +1 more source

P‐30: A Relation Between an a‐Si: H Integrated Buffer Transistor Resistance and Falling Time of Gate Output Signal

SID Symposium Digest of Technical Papers, 2008
Abstract In case of using an a‐Si:H integrated gate driver for TFT‐LCD [1–4], it's important to define gate falling time exactly. Because an a‐Si:H integrated gate driver might degrade with bad environment easily, which result in gate signal delay or decreasing output signal.
Do‐Sung Kim   +7 more
openaire   +1 more source

Epitaxial Liftoff Integration of a GaAs Multiple Quantum Well Modulator Array onto Si VLSI for Optical Signal Processing

Spatial Light Modulators and Applications, 1995
The need for increased processing speed in advanced computing systems is straining the limits of purely electronic systems. Opto-electronic systems may represent the future form of implementation of high throughput data processing systems. The components that are selected for Opto-Electronic data processing systems have to meet the requirements of both
W. Chang   +7 more
openaire   +1 more source

Waveguide-integrated Si nano-photodiode with surface-plasmon antenna and its application to on-chip optical clock signal distribution

2008 5th IEEE International Conference on Group IV Photonics, 2008
We developed a waveguide-integrated Si nano-photodiode (PD) with a surface plasmon (SP) antenna for on-chip optical clock distribution. The interfacial periodic nano-scale metal-semiconductor-metal Schottky electrodes were shown to function as an SP optical antenna and also as an optical coupler between a SiON waveguide and a very thin Si-absorption ...
Junichi Fujikata   +14 more
openaire   +1 more source

Integration of Si-CMOS embedded photo detector array and mixed signal processing system with embedded optical waveguide input

SPIE Proceedings, 2004
ABSTRACT Arrays of embedded bipolar junction transistor (BJT) photo detectors (PD) and a parallel mixed-signal pro-cessing system were fabricated as a silicon complementary metal oxide semiconductor (Si-CMOS) circuit forthe integration optical sensors on the surface of the chip.
Daeik D. Kim   +3 more
openaire   +1 more source

Signal and power integrity (SI/PI) analysis of heterogeneous integration using embedded multi-die interconnect bridge (EMIB) technology for high bandwidth memory (HBM)

2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2017
Silicon interposer with high bandwidth memory (HBM) has been developed to achieve a terabyte/s bandwidth graphic card module. However, silicon interposer still has critical drawbacks regarding the complexity of fabrication and manufacturing cost. Especially, expensive through-silicon-via (TSV) process has become a serious problem for cost reduction. An
Kyungjun Cho   +7 more
openaire   +1 more source

Analysis and improvement of Si integrated on-chip dipole antennas using high-k dielectric materials for ultra wideband signal transmission

2014 International Conference on Informatics, Electronics & Vision (ICIEV), 2014
In this paper, a linear on-chip dipole antenna pair on Si substrate is analyzed and simulated to investigate the transmission characteristics using CST MICROWAVE STUDIO. By inserting a 1.4 mm thick diamond layer between substrate and heat sink, the obtained transmission gain of antenna pair of length 4mm with 3mm separation on 10 Ohm-cm Si substrate ...
Md. Mahmud-Ul-Tarik Chowdhury   +2 more
openaire   +1 more source

Signal integrity analysis of heterogeneous integration using Si bridge technology

2023 20th International SoC Design Conference (ISOCC), 2023
Yong-Nam Koh   +5 more
openaire   +1 more source

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