Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression. [PDF]
Choi JW +6 more
europepmc +1 more source
Tailoring Phonon‐Driven Responses in α‐MoO3 through Isotopic Enrichment
ABSTRACT The implementation of polaritonic materials into nanoscale devices requires selective tuning of parameters to realize desired spectral or thermal responses. One robust material, α‐MoO3, an orthorhombic crystal boasting three distinct phonon dispersions, provides three polaritonic dispersions of hyperbolic phonon polaritons (HPhPs) across the ...
Thiago S. Arnaud +31 more
wiley +1 more source
Integration of Er<sup>3+</sup> Emitters in Silicon-on-Insulator Nanodisk Metasurface. [PDF]
Bader J +6 more
europepmc +1 more source
A deep learning inverse‐design framework is established to create versatile reconfigurable terahertz metadevices. By synergizing deep learning with phase‐change materials, this approach enables on‐demand customization of multidimensional electromagnetic responses.
Yisheng Dong +11 more
wiley +1 more source
Effect of Silicon-on-Insulator Substrate on Residual Strain in 3C-SiC Films
One group of SiC films are grown on silicon-on-insulator (SOI) substrates with a series of silicon-overlayer thickness. Raman scattering spectroscopy measurement clearly indicates that a systematic trend of residual stress reduction as the silicon over ...
Wang Lei +7 more
core
Silicon-on-Insulator (SOI) Lateral Power-Reduced Surface Field FinFET with High-Power Figure of Merit of 239.3 MW/cm<sup>2</sup>. [PDF]
Song CW, Lee T, Kim D, Kyoung S, Woo S.
europepmc +1 more source
A double‐sided mechanical interlocking strategy is developed to create robust electrical contact between polymer electrode and metal interconnect. The fibrous structure enables formation of thread–hole adhesion, which only breaks under bulk failure and achieves a record high interfacial energy exceeding 730 J·m−2. This adhesion secures the integrity of
Gang Li +6 more
wiley +1 more source
A NEW TYPE OF SILICON-ON-INSULATOR WITH A PERFECT SURFACE SILICON LAYER
A novel silicon structure consisting of a silicon-on-defect layer (SODL), with enhanced surface Hall mobility in the surface layer on a buried defect layer (DL), has been discovered [J. Li, Nucl. Instr. and Meth. B59/60 (1991) 1053].
ZHU JC +3 more
core
Volatile and non-volatile nano-electromechanical switches fabricated in a CMOS-compatible silicon-on-insulator foundry process. [PDF]
Li Y +11 more
europepmc +1 more source
One-Stage Formation of Two-Dimensional Photonic Crystal and Spatially Ordered Arrays of Self-Assembled Ge(Si) Nanoislandson Pit-Patterned Silicon-On-Insulator Substrate. [PDF]
Novikov AV +10 more
europepmc +1 more source

