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Soft Error Mitigation

2021
Soft errors are transient events with a short time interval induced by energetic particles coming from terrestrial and space radiations. Radiation-induced soft errors may cause critical failures in system behavior, leading to financial or human life losses.
Alexandra Zimpeck   +3 more
openaire   +2 more sources

RAT: A Lightweight System-level Soft Error Mitigation Technique

2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), 2020
To achieve a substantial reliability and safety level, it is imperative to provide electronic computing systems with appropriate mechanisms to tackle soft errors. This paper proposes a low-cost system-level soft error mitigation technique, which allocates the critical application function to a pool of specific general-purpose processor registers.
Jonas Gava, Ricardo Reis, Luciano Ost
openaire   +2 more sources

A survey of circuit-level soft error mitigation methodologies

Analog Integrated Circuits and Signal Processing, 2018
Soft errors created due to propagation of single event transients are a significant reliability challenge in modern VLSI. With advances in CMOS technology scaling, circuits become increasingly more sensitive to transient pulses caused by energetic particles.
S. Sayil
openaire   +2 more sources

ISO26262-compliant soft-error mitigation in register banks

2017 22nd IEEE European Test Symposium (ETS), 2017
Temporary malfunction of ICs is often caused by Single Event Upsets (SEUs). That is why the automotive safety standard ISO 26262 demands measures to detect and mitigate a certain percentage of safety-critical SEUs. Different kinds of modules require different kinds of safety mechanisms. A frequently used module type is the Register Bank, which provides
J. Schat
openaire   +2 more sources

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