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Soft Error Mitigation in Soft-Core Processors
2016This chapter aims to present different approaches and techniques available in literature regarding the fault mitigation on soft-core processors, with an especial emphasis on those ones involving hardware/software hybrid-based solutions.
Antonio Martínez-Álvarez +2 more
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Soft Error Mitigation on Dual Rail Latch
Applied Mechanics and Materials, 2016A single event upset (SEU) or soft error is defined as a temporary error on digital electronics due to the effect of radiation. Such an error can cause system failure, e.g. a deadlock in an asynchronous system or production of incorrect outputs due to data corruption.
Norhuzaimin bin Julai
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Temporal redundancy latch-based architecture for soft error mitigation
2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS), 2017Current transients caused by energetic particle strikes are a serious threat for digital circuits in aerospace applications. Such single-event transients (SETs) can corrupt the circuit state, with possibly devastating consequences. Although it is possible to protect circuits with spatial redundancy techniques, the area and power overhead is high ...
Robert Schmidt +2 more
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Physical Design Methodologies for Soft Error Mitigation Using Redundancy
2015 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2015This paper demonstrates methodologies for designing soft-error hardened logic on commercial foundry processes. Physical design flows employ standard CAD tools to provide spatial separation that alleviates risk of multiple node charge collection upsets. To demonstrate and compare the proposed techniques, an advanced encryption standard (AES) encryption ...
Chandarasekaran Ramamurthy +2 more
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ACM Trans. Design Autom. Electr. Syst., 2023
As technology continuously shrinks, radiation-induced soft errors have become a great threat to the circuit reliability. Among all the causes, the Single-Event Transient (SET) effect is the dominating one for the radiation-induced soft errors.
Xu He +5 more
semanticscholar +1 more source
As technology continuously shrinks, radiation-induced soft errors have become a great threat to the circuit reliability. Among all the causes, the Single-Event Transient (SET) effect is the dominating one for the radiation-induced soft errors.
Xu He +5 more
semanticscholar +1 more source
Reliability Engineering & System Safety, 2022
With the progressive miniaturization of integrated circuits and the increasing complexity of logic functions, the possibility of software system failure triggered by soft errors in the context of intensive space radiation is also increasing.
Shunkun Yang, Qi Shao, Chong Bian
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With the progressive miniaturization of integrated circuits and the increasing complexity of logic functions, the possibility of software system failure triggered by soft errors in the context of intensive space radiation is also increasing.
Shunkun Yang, Qi Shao, Chong Bian
semanticscholar +1 more source
Optimal soft error mitigation in wireless communication using approximate logic circuits
Sustainable Computing: Informatics and Systems, 2021The development of in chip manufacturing processes has enhanced energy-efficient nano-electronic and high-performance devices in daily activities. In recent times, CMOS technology scaling has recognized several transistors in large-scale VLSI chips to ...
J. H. Anajemba +4 more
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Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators
International Conference on Artificial Intelligence Circuits and Systems, 2020Convolution neural networks (CNNs) have been widely used in many applications. Field-Programmable Gate Array (FPGA) based accelerator is an ideal solution for CNNs in embedded systems.
Wenshuo Li +7 more
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Circuit Level Design Methods to Mitigate Soft Errors
2020 IEEE Latin-American Test Symposium (LATS), 2020The mitigation of soft errors should be considered in all design abstraction levels, from a high level to the physical one. This tutorial is focused on the circuit and physical design levels. Transistor reordering or transistor arrangements is an important way to improve robustness.
Ricardo Reis +4 more
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Characterizing and Mitigating Soft Errors in GPU DRAM
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021GPUs are used in high-reliability systems, including high-performance computers and autonomous vehicles. Because GPUs employ a high-bandwidth, wide-interface to DRAM and fetch each memory access from a single DRAM device, implementing full-device correction through ECC is expensive and impractical.
Michael B. Sullivan +8 more
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