Results 81 to 90 of about 115 (112)
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SRAM-Based FPGAs: Testing the Embedded RAM Modules
Journal of Electronic Testing, 1999This paper addresses the problem of testing the RAM mode of the LUT/RAM modules of configurable SRAM-based Field Programmable Gate Arrays (FPGAs) using a minimum number of test configurations. A model of architecture for the LUT/RAM module with N inputs and 2N memory cells is proposed taking into account the LUT and RAM modes.
Michel Renovell +3 more
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Self rerouting of dynamically reconfigurable SRAM-based FPGAs
2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2017Reconfigurable devices are widely attractive for several application fields thanks to their size, rapid prototyping characteristics, flexibility and upgradability. Thanks to partial Reconfiguration features, FPGA becomes the golden core of the adaptive computation paradigm since they may dynamically change their functionalities based on the elaboration
BOZZOLI, LUDOVICA, STERPONE, LUCA
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A Flexible Inexact TMR Technique for SRAM-based FPGAs
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016Single Event Upsets (SEUs) inadvertently change the logic memory and thereby the configuration of the Field Programmable Gate Arrays (FPGAs), leading to their incorrect functioning. Traditional methods to tolerate such faults include Triple Modular Redundancy (TMR). However, such method has a high overhead in terms of power and area.
Shyamsundar Venkataraman +2 more
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Reliability of a softcore processor in a commercial SRAM-based FPGA
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays, 2012Softcore processors are an attractive alternative to using radiation-hardened processors in space-based applications. Unlike traditional processors however, the logic and routing of a softcore processor are vulnerable to the effects of single-event upsets (SEUs).
Nathaniel H. Rollins +1 more
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SRAM-based FPGA's: testing the interconnect/logic interface
Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259), 2002This paper address the problem of testing the configurable modules that interface the global interconnect and the logic cells of SRAM-based FPGAs. The Configurable Interface Modules (CIMs) are assumed to be implemented with FPGA multiplexers but the results can be easily extended to any type of interface module.
Michel Renovell +3 more
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An universal CLA adder generator for SRAM-based FPGAs
1996In this paper we present an universal module generator for hierarchical carry lookahead adders of any word length which is suitable for most SRAM-based FPGA architectures. We introduce a generic model of SRAM-based FPGAs taking different configurations of the logic blocks into account.
Jörn Stohmann, Erich Barke
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Intentional Attacks on SRAM-based FPGAs
2008This paper summarizes the main types of attacks that can be targeted towards secured circuits, with a special emphasis on fault-based attacks (glitch based and laser based). Experimental set-ups are presented and the error patterns induced on a Virtex II FPGA platform are shown.
Canivet, G. +4 more
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A Specific Test Methodology for Symmetric SRAM-Based FPGAs
2000This paper describes a test methodology for symmetric SRAM-based FPGAs. From a fundamental point of view, a test methodology for FPGAs differs from the test methodology for ASICs mainly due to the configurability of such flexible devices. In the paper, the FPGA architecture is first analyzed identifying the test problems specific to FPGAs as well as ...
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Simulation-Based Analysis of SEU Effects on SRAM-based FPGAs
2002Commercial-Off-The-Shelf SRAM-based FPGA devices are becoming of interests for applications where high dependability and low cost are mandatory constraints. This paper proposes a new fault injection environment, which offers an alternative to radiation testing for evaluating the effects of charged particles on the configuration memory of SRAM-based ...
REBAUDENGO, Maurizio +2 more
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On the evaluation of SEU sensitiveness in SRAM-based FPGAs
Proceedings. 10th IEEE International On-Line Testing Symposium, 2004BERNARDI, PAOLO +3 more
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