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Protocol for the quantitative imaging and segmentation of spatial patterns in Hibiscus trionum petals. [PDF]

STAR Protoc
Riglet L, Moyroud E.
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Visual Recommendations and Label Layout for Stacked Graphs

Visual Recommendations and Label Layout for Stacked Graphs
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SaVioR: Thwarting Stack-Based Memory Safety Violations by Randomizing Stack Layout

IEEE Transactions on Dependable and Secure Computing, 2022
Stack-based memory corruption vulnerabilities have been exploited, allowing attackers to execute arbitrary code and read/write arbitrary memory. Although several solutions have been proposed to prevent memory errors on the stack, they are either limited to a specific type of attack (either spatial or temporal attacks) or cause significant performance ...
Seongman Lee, Brent Kang, Hyeonwoo Kang   +2 more
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Detecting Stack Layout Corruptions with Robust Stack Unwinding

Lecture Notes in Computer Science, 2016
The stack is a critical memory structure to ensure the correct execution of programs because control flow changes through the data stored in it, such as return addresses and function pointers. Thus the stack has been a popular target by many attacks and exploits like stack smashing attacks and return-oriented programming (ROP).
Yangchun Fu, Zhiqiang Lin, Guofei Jiang   +2 more
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Defense against Stack-Based Attacks Using Speculative Stack Layout Transformation

Lecture Notes in Computer Science, 2013
This paper describes a novel technique to defend binaries against intra-frame stack-based attacks, including overflows into local variables, when source code is unavailable. The technique infers a specification of a function’s stack layout, i.e., variable locations and boundaries, and then seeks to apply a combination of transformations, including ...
Anh Nguyen-Tuong, Jason D Hiser, Michele Co   +2 more
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Stack and Queue Layouts of Directed Acyclic Graphs: Part II

SIAM Journal on Computing, 1999
Summary: Stack layouts and queue layouts of undirected graphs have been used to model problems in fault tolerant computing and in parallel process scheduling. However, problems in parallel process scheduling are more accurately modeled by stack and queue layouts of directed acyclic graphs (dags).
Lenwood Heath
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Multi-stack optimization for data-path chip (microprocessor) layout

Proceedings of the 1989 26th ACM/IEEE conference on Design automation conference - DAC '89, 1989
As data-path chips such as microprocessors and RISC chips become more complex, multiple stacks of data-path macros are required to implement the entire data-path. The physical decomposition of a chip into a single data-path stack, and control logic of random logic as in the past is not always feasible.
Wing K. Luk, Alvar A. Dean
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Smokestack: Thwarting DOP Attacks with Runtime Stack Layout Randomization

2019 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 2019
Misiker Tadesse Aga, Todd M. Austin
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Stack layout transformation: Towards diversity for securing binary programs

2012 34th International Conference on Software Engineering (ICSE), 2012
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Stack and Queue Layouts of Directed Acyclic Graphs: Part I

SIAM Journal on Computing, 1993
Summary: Stack layouts and queue layouts of undirected graphs have been used to model problems in fault-tolerant computing and in parallel process scheduling. However, problems in parallel process scheduling are more accurately modeled by stack and queue layouts of directed acyclic graphs (dags).
Lenwood S. Heath, Sriram V. Pemmaraju, Ann N. Trenk   +2 more
openaire   +2 more sources