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High performance radiation hardened static random access memory (SRAM) design for space applications
2004 IEEE Aerospace Conference Proceedings (IEEE Cat. No.04TH8720), 2004Static random access memory (SRAM) product for advanced space applications must demonstrate high performance to meet the ever increasing data rates of space systems and must be radiation hardened to ensure unfettered, reliable operation in the harsh environments of outer space. High performance and radiation hardness are not mutually exclusive.
S. Doyle +5 more
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A Review of Low-Power Static Random Access Memory (SRAM) Designs
2023 IEEE Devices for Integrated Circuit (DevIC), 2023Neetu Rathi +3 more
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IEEE Electron Device Letters, 2022 IEEEA three-dimensional (3-D) and printed static random-access memory (SRAM) based on complementary organic thin-film transistors is demonstrated. The SRAM exhibited the smallest area of 2.1 mm2, the highest normalized static noise margin of 62%, and the
Sungjune Jung, Woojo Kim
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Nano-optomechanical static random access memory (SRAM)
2015 28th IEEE International Conference on Micro Electro Mechanical Systems (MEMS), 2015This paper reports an on chip nano-optomechanical SRAM, which is integrated with light modulation system on a single silicon chip. In particular, a doubly-clamped silicon beam shows bistability due to the non-linear optical gradient force generated from a ring resonator. The memory states are assigned with two stable deformation positions, which can be
B. Dong +7 more
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4H-SiC Radiation Hardened Static Random Access Memory
IEEE Electron Device Letters4H-SiC static random-access memory (SRAM) was suggested and demonstrated for extreme-environment applications. The 4H-SiC SRAMs show the proper memory states with high static noise margins (SNMs).
Shin-Ichiro Kuroki +2 more
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Performance analysis and design of optimized static random access memory (SRAM)
Microelectronics Journal, 1993Abstract Achieving specific access time requirements while maintaining low area and power are important design goals for high-performance embedded Static RAMs. In this paper, we present a new design for the pre-charge circuit of an SRAM called ‘Power-Down Y-Controlled PMOS (PDYCP) load pre-charge’, which reduces power dissipation by a factor of three
Jahangir Dewan +2 more
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Exploring CMOS Technology Impact on Static Random Access Memory (SRAM): A Performance Assessment
2025 International Conference on Electrical, Computer and Communication Engineering (ECCE)M. R. Robin +5 more
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Trends in bipolar static random access memory (SRAM) design
Proceedings of the Bipolar Circuits and Technology Meeting, 2003A comparison of the high-performance static random access memories (SRAMs) of today to those of 20 years ago (1969) shows that the performance has been increased by a factor of 10 while costs have been improved by a factor of 100. An overview of SRAM circuits is provided, covering early configurations; ECL memory cells; alpha-particle soft errors ...
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Failure analysis of die-attachment on static random access memory (SRAM) semiconductor devices
Journal of Electronic Materials, 1987Different combinations of the SRAM die and the substrates to yield a better die-attachment are studied. Cleanliness of die backside, plasma etching of contaminated die backside, new frames and old frames are the factors considered. The number of rejects due to die cracking in the die-attachment can be minimized if (1) production die and new frames are ...
S. L. Tan +3 more
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