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Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015We prove analytically that the yield of static random access memory (SRAM) is intrinsically a function of its architecture owing to the correlation among cell failures. In addition, architecture-aware analytical yield models are proposed for read access. The yield results using the proposed models show that the most dominant factor determining yield is
Heechai Kang +4 more
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Applications in Static Random Access Memory (SRAM)
2016Continuous efforts to shrink the physical size of transistors enable the integration of a larger number of transistors on a single chip.
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Low-Power Dynamic Memory Word Line Decoding for Static Random Access Memories
IEEE Journal of Solid-State Circuits, 2008Conventional memory address decoders based on static CMOS gates incur high clock loading and unnecessary power dissipation in unselected banks. This paper presents a dynamic word line decoder which is fast, has reduced active and leakage power dissipation, and also enables faster race-free sense timing.
Giby Samson +3 more
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Statistical Simulation of Static Noise Margin Variability in Static Random Access Memory
IEEE Transactions on Semiconductor Manufacturing, 2010In this paper, we examine the impact of random-dopant-fluctuation (RDF), process-variation-effect (PVE), and workfunction-fluctuation (WKF), on 16-nm-gate metal-oxide-semiconductor field-effect-transistor (MOSFET) static random access memory (SRAM) cells.
Yiming Li, Hui-Wen Cheng, Ming-Hung Han
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Reliability Improvement of Static Random Access Memory Bit-Cells
2019 International Conference on Smart Systems and Inventive Technology (ICSSIT), 2019The rapid growth in the semiconductor industry has paved the pathway for tremendous advancement in semiconductor memory technology. Internet of Things (IoT), wireless body sensor nodes and other high-end applications need power-efficient and reliable memories.
E.Jebamalar Leavline, A. Sugantha
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Design of static random access memory using QCA technology
2016 3rd International Conference on Devices, Circuits and Systems (ICDCS), 2016Quantum dot Cellular Automata(QCA) is one of the emerging trends in the field of nanotechnology which helps to overcome the limitations of CMOS technology. QCA can be used to design memory circuits. Static Random Access Memory (SRAM) is one of the attractive application of QCA technology.
D. Gracia Nirmala Rani +5 more
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Static Random Access Memory Failure Analysis
International Symposium for Testing and Failure AnalysisAbstract Presentation slides for the ISTFA 2025 Tutorial session “Static Random Access Memory Failure Analysis.”
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4096 bit and larger bipolar static random access memories
Microelectronics Journal, 1980A description of a new 4096 bit, 600mw, 25ns, TAA static TTL RAM with a 2.3 mil 2 cell and a 17,200 mil 2 die is presented. The evolution of static bipolar RAMs is discussed along with an analysis of the power allocation of the current 600mW 4096 bit device. The use of PNP memory cell load devices and Darlington word drivers will lower overhead power
William H. Herndon, Wally Ho, Warren Ong
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A bit cell for a static random access memory
2018According to an aspect of the present inventive concept there is provided a bit cell for a Static Random Access Memory, SRAM, the bit cell comprising: a first and a second vertical stack of transistors arranged on a substrate, each stack including: a pull-up transistor, a pull-down transistor and a pass transistor, each transistor including a ...
Weckx, Pieter +3 more
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Built-in Diagnostic Approaches for a Static Random Access Memory
2021 IEEE International Conference on Sensors and Nanotechnology (SENNANO), 2021Fanar Abass, Qais Al-Gayem
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