Results 241 to 250 of about 303,516 (284)
Some of the next articles are maybe not open access.
Nano-optomechanical static random access memory (SRAM)
2015 28th IEEE International Conference on Micro Electro Mechanical Systems (MEMS), 2015This paper reports an on chip nano-optomechanical SRAM, which is integrated with light modulation system on a single silicon chip. In particular, a doubly-clamped silicon beam shows bistability due to the non-linear optical gradient force generated from a ring resonator. The memory states are assigned with two stable deformation positions, which can be
B. Dong +7 more
openaire +1 more source
A static 4096-bit bipolar random-access memory
IEEE Journal of Solid-State Circuits, 1977A description of a 23600 mil/SUP 2/, 35-ns 4096/spl times/1 bit bipolar RAM is presented. The historical evolution of density and performance of the 1024/spl times/1 forerunner along with advanced production and circuit techniques indicate the availability of an 11000 mil/SUP 2/, 10-ns, 4096/spl times/1 bipolar RAM by 1981.
W.H. Herndon, W. Ho, R. Ramirez
openaire +1 more source
International Journal of Circuit Theory and Applications, 2012
ABSTRACTThe cell static noise margin (SNM) is widely used as a stability criterion for static random‐access memory cells design. This parameter is typically determined through electrical simulations since direct experimental characterization of SNM is not achievable.In this work, we present a methodology that provides an indirect measurement of the SNM
José Luis Merino +3 more
openaire +1 more source
ABSTRACTThe cell static noise margin (SNM) is widely used as a stability criterion for static random‐access memory cells design. This parameter is typically determined through electrical simulations since direct experimental characterization of SNM is not achievable.In this work, we present a methodology that provides an indirect measurement of the SNM
José Luis Merino +3 more
openaire +1 more source
A March-based fault location algorithm for static random access memories
Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW 2002), 2003A March-based fault location algorithm is proposed for the repair of word-oriented static RAMs. A March CL algorithm of complexity 12N, N is the number of memory words, is defined for fault detection and partial diagnosis. A 3N or 4N March-like algorithm is used for location of the aggressor words of inter-word state, idempotent, inversion, write ...
Valery A. Vardanian, Yervant Zorian
openaire +1 more source
A dynamic reconfiguration scheme for mega bit Static Random Access Memories
Microelectronics Reliability, 1994Abstract The objective of this paper is to present a novel dynamic reconfiguration scheme for mega bit Static Random Access Memories (SRAMs). Most of the conventional reconfiguration methods are implemented using two-way switching elements. The proposed scheme is based on on-chip word failure detection and reconfiguration to spare word cell using ...
Venkatapathi N. Rayapati +1 more
openaire +2 more sources
Static Random Access Memory Technologies
2009This chapter contains sections titled: Basic SRAM Architecture and Cell Structures SRAM Selection Considerations High Performance SRAMs Advanced SRAM Architectures Low-Voltage SRAMs BiCMOS Technology SRAMs SOI SRAMs Specialty SRAMs This chapter contains sections titled ...
openaire +1 more source
A parallel approach for testing multi-port static random access memories
Proceedings 2001 IEEE International Workshop on Memory Technology, Design and Testing, 2002This paper presents a novel approach for testing multiport memories. This approach is based on the parallel execution of the testing process so that inter-port faults (shorts and coupling faults) can be detected at no loss of coverage and with no increase in the number of tests compared with a single-port memory.
Farzin Karimi +3 more
openaire +1 more source
Minimal March Tests for Unlinked Static Faults in Random Access Memories
23rd IEEE VLSI Test Symposium (VTS'05), 2005New minimal March test algorithms are proposed for detection of (all) unlinked static faults in random access memories. In particular, a new minimal March MSS test of complexity I8N is introduced detecting all realistic simple static faults, as March SS (22N), (S. Hamdioui, van de Goor, Rodgers, MTDT 2002).
Gurgen Harutunyan +2 more
openaire +1 more source
Parallel testing of multi-port static random access memories for BIST
Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002Presents a built-in-self test (BIST) technique to implement the parallel approach for testing multi-port memories. This approach is based on the parallel execution of the testing process so that inter-port faults (shorts and coupling faults) can be detected at no loss of coverage and with no increase in the number of tests compared with a single-port ...
Farzin Karimi, Fabrizio Lombardi
openaire +1 more source
A realistic fault model and test algorithms for static random access memories
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990Testing static random access memories (SRAMs) for all possible failures is not feasible and one must restrict the class of faults to be considered. This restricted class is called a fault model. A fault model for SRAMs based on physical spot defects, which are modeled as local disturbances in the layout of the SRAM, is presented.
Rob Dekker +2 more
openaire +1 more source