Design of 7T SRAM Using InGaAs-Dual Pocket-Dual Gate-Tunnel FET for IoT Applications
The Internet of Things (IoT) is becoming increasingly popular in areas like wearable communication devices, biomedical devices, and home automation systems.
Gadarapulla Rasheed +1 more
doaj +1 more source
A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs [PDF]
The continues improvement of manufacturing technologies allows the realization of integrated circuits containing an ever increasing number of transistors. A major part of these devices is devoted to realize SRAM blocks.
Di Carlo, Stefano +5 more
core +1 more source
Improved Performance of SRAM-Based True Random Number Generator by Leveraging Irradiation Exposure
Encryption is an important step for secure data transmission, and a true random number generator (TRNG) is a key building block in many encryption algorithms. Static random-access memory (SRAM) chips can be easily available sources of true random numbers,
Xu Zhang +9 more
doaj +1 more source
In this paper, a new approach toward the design of a memristor based nonvolatile static random-access memory (SRAM) cell using a combination of memristor and metal-oxide semiconductor devices is proposed. Memristor and MOSFETs of the Taiwan Semiconductor
Syed Shakib Sarwar +3 more
doaj +1 more source
A Monolithic 3-Dimensional Static Random Access Memory Containing a Feedback Field Effect Transistor
A monolithic three-dimensional integrated static random access memory containing a feedback field effect transistor (M3D-FBFET-SRAM) was proposed. The M3D-FBFET-SRAM cell consists of one metal oxide semiconductor field effect transistor (MOSFET) and one ...
Jong Hyeok Oh, Yun Seop Yu
doaj +1 more source
Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability [PDF]
In this paper we illustrate how by using advanced atomistic TCAD tools the interplay between long-range process variation and short-range statistical variability in FinFETs can be accurately modelled and simulated for the purposes of Design-Technology Co-
Asenov, A. +4 more
core +1 more source
SRAM Cell Design Challenges in Modern Deep Sub-Micron Technologies: An Overview
Microprocessors use static random-access memory (SRAM) cells in the cache memory design. As a part of the central computing component, their performance is critical.
Waqas Gul +2 more
doaj +1 more source
Nonvolatile Static Random Access Memory Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture [PDF]
We propose and computationally analyze a nonvolatile static random access memory (NV-SRAM) cell using magnetic tunnel junctions (MTJs) with magnetic-field-free current-induced magnetization switching (CIMS) architecture. A pair of MTJs connected to the storage nodes of a standard SRAM cell with CIMS architecture enables fully electrical store and ...
S. Yamamoto, S. Sugahara
openaire +2 more sources
The impact of random doping effects on CMOS SRAM cell [PDF]
The SRAM has a very constrained cell area and is consequently sensitive to the intrinsic parameter fluctuations ubiquitous in decananometer scale MOSFETs.
Asenov, A., Cheng, B., Roy, S.
core +1 more source
Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory
Static random access memory (SRAM) is the most commonly employed semiconductor in the design of on-chip processor memory. However, it is unlikely that the SRAM technology will have a cell size that will continue to scale below 45 nm, due to the leakage ...
Luís Vitório Cargnini +4 more
doaj +1 more source

