Results 31 to 40 of about 12,245 (196)
Hi-End: Hierarchical, Endurance-Aware STT-MRAM-Based Register File for Energy-Efficient GPUs
IEEE Access, 2020 Modern Graphics Processing Units (GPUs) require large hardware resources for massive parallel thread executions. In particular, modern GPUs have a large register file composed of Static Random Access Memory (SRAM). Due to the high leakage current of SRAM,
Won Jeon +4 more
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A Review on Enhancement of SRAM Memory Cell [PDF]
, 2020 In this field research paper explores the design and analysis of Static Random Access Memory (SRAMs) that focuses on optimizing delay and power. CMOS SRAM cell consumes very little power and has less read and write time.
Kushwaha, Amrit Lal +1 more
core +1 more source
Ultra-Low Power High Stability 8T SRAM for Application in Object Tracking System
IEEE Access, 2018 In this paper, an ultra-low power (ULP) 8T static random access memory (SRAM) is proposed. The proposed SRAM shows better results as compared with conventional SRAMs in terms of leakage power, write static noise margin, write-ability, read margin, and ...
Pooran Singh, Santosh Kumar Vishvakarma
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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2022 A binarized neural network (BNN) accelerator based on a processing-in-memory (PIM)/ computing-in-memory (CIM) architecture using ultralow-voltage retention static random access memory (ULVR-SRAM) is proposed for the energy minimum-point (EMP) operation ...
Yusaku Shiotsu, Satoshi Sugahara
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HALLS: An Energy-Efficient Highly Adaptable Last Level STT-RAM Cache for Multicore Systems [PDF]
, 1968 Spin-Transfer Torque RAM (STT-RAM) is widely considered a promising alternative to SRAM in the memory hierarchy due to STT-RAM's non-volatility, low leakage power, high density, and fast read speed.
Adegbija, Tosiron, Kuan, Kyle
core +4 more sources
Radiation tolerant capacitor-SRAM without area overhead
Nuclear Engineering and TechnologyIn memory semiconductors such as a static random access memory (SRAM), a common problem is soft errors under radiation environment. These soft errors cause bit flips, which are referred to as single event upsets (SEUs). Some radiation-hardened SRAM cells
Eunju Jo +4 more
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Lightweight and Low-Latency AES Accelerator Using Shared SRAM
IEEE Access, 2022 In this study, we propose a lightweight and low-latency advanced encryption standard (AES) accelerator. Instead of being connected to the bus through its own slave wrapper, the proposed AES accelerator is located within the slave wrapper of the static ...
Jae Seong Lee +2 more
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Low-power adiabatic 9T static random access memory
The Journal of Engineering, 2014 In this paper, the authors propose a novel static random access memory (SRAM) that employs the adiabatic logic principle. To reduce energy dissipation, the proposed adiabatic SRAM is driven by two trapezoidal-wave pulses.
Yasuhiro Takahashi +3 more
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Automating defects simulation and fault modeling for SRAMs [PDF]
, 2008 The continues improvement in manufacturing process density for very deep sub micron technologies constantly leads to new classes of defects in memory devices. Exploring the effect of fabrication defects in future technologies, and identifying new classes
Al-Ars, Z. +3 more
core +1 more source
Journal of Low Power Electronics and Applications, 2017 In this paper, an ultra-low power (ULP) 10T static random access memory (SRAM) is presented for Internet of Things (IoT) applications, which operates at sub-threshold voltage. The proposed SRAM has the tendency to operate at low supply voltages with high
Pooran Singh, Santosh Kumar Vishvakarma
doaj +1 more source