Results 41 to 50 of about 12,245 (196)

Differential Read/Write 7T SRAM With Bit-Interleaved Structure for Near-Threshold Operation

IEEE Access, 2021
Near-threshold voltage ( $V_{th}$ ) operation is an effective method for lowering energy consumption. However, it increases the impact of $V_{th}$ variation significantly, which makes it difficult for previously proposed static random access memory ...
Ji Sang Oh, Juhyun Park, Keonhee Cho, Tae Woo Oh, Seong-Ook Jung   +4 more
doaj   +1 more source

Design Of 1K Asynchronous Static Random Access Memory Using 0.35 Micron Complementary Metal Oxide Semiconductor Technology [PDF]

, 2005
Static Random Access Memory (SRAM) is a high speed semiconductor memory which is widely used as cache memory in microprocessors and microcontrollers, telecommunication and networking devices.
Yeong, Tak Nging
core  

Study of Resistive Switching Dynamics and Memory States Equilibria in Analog Filamentary Conductive‐Metal‐Oxide/HfOx ReRAM via Compact Modeling

Advanced Electronic Materials, EarlyView.
A physics‐based compact model for Conductive‐Metal‐Oxide/HfOx ReRAM, accounting for ion dynamics, electronic conduction, and thermal effects, is presented. Accurate and versatile simulations of analog non‐volatile conductance modulation and memory state stabilization enable reliable circuit‐level studies, advancing the optimization of neuromorphic and ...
Matteo Galetta, Donato Francesco Falcone, Victoria Clerico, Wooseok Choi, Stephan Menzel, Antonio La Porta, Tommaso Stecconi, Folkert Horst, Bert Jan Offrein, Valeria Bragaglia   +9 more
wiley   +1 more source

Multi-valued static random access memory (SRAM) cell with single-electron and MOSFET hybrid circuit

Electronics Letters, 2005
A new multi-valued static random access memory (MVSRAM) cell with a hybrid circuit consisting of a single-electron (SE) and MOSFETs is proposed. The previously reported MVSRAM with an SE-MOSFET hybrid circuit needs two data lines, one bit line for write operations and one sense line for read operations, to improve the speed of the read-out operation ...
Y.S. Yu, H.W. Kye, B.N. Song, S.-J. Kim, J.-B. Choi   +4 more
openaire   +1 more source

Organic Thin‐Film Transistors for Neuromorphic Computing

Advanced Electronic Materials, EarlyView.
Organic thin‐film transistors (OTFTs) are reviewed for neuromorphic computing applications, highlighting their power‐efficient, and biological time‐scale operation. This article surveys OFET and OECT devices, compares them with memristors and CMOS, analyzes how fabrication parameters shape spike‐based metrics, proposes standardized characterization ...
Luke McCarthy, Mohan V. Jacob, Mostafa Rahimi Azghadi   +2 more
wiley   +1 more source

DESIGN OF LOW POWER 8T SRAM WITH SCHMITT TRIGGER LOGIC [PDF]

Journal of Engineering Science and Technology, 2014
Static Random Access Memory (SRAM) has become a key element in modern VLSI systems. In this paper, a low power design of 8 Transistor SRAM cell with Schmitt Trigger (ST) logic is proposed.
A. KISHORE KUMAR, D. SOMASUNDARESWARI, V. DURAISAMY, T. SHUNBAGA PRADEEPA   +3 more
doaj  

Significance Driven Hybrid 8T-6T SRAM for Energy-Efficient Synaptic Storage in Artificial Neural Networks

, 2016
Multilayered artificial neural networks (ANN) have found widespread utility in classification and recognition applications. The scale and complexity of such networks together with the inadequacies of general purpose computing platforms have led to a ...
Jaiswal, Akhilesh, Roy, Kaushik, Sarwar, Syed Shakib, Srinivasan, Gopalakrishnan, Wijesinghe, Parami   +4 more
core   +1 more source

Software-Based Self-Test of Set-Associative Cache Memories [PDF]

, 2011
Embedded microprocessor cache memories suffer from limited observability and controllability creating problems during in-system tests. This paper presents a procedure to transform traditional march tests into software-based self-test programs for set ...
Di Carlo, Stefano, Prinetto, Paolo Ernesto, Savino, Alessandro   +2 more
core   +1 more source

Fundamental Challenges, Physical Implementations, and Integration Strategies for Ising Machines in Large‐Scale Optimization Tasks

Advanced Electronic Materials, EarlyView.
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley   +1 more source

Memristor-Based Resistive Random Access Memory: Hybrid Architecture for Low Power Compact Memory Design [PDF]

, 2014
The computer memory system has both volatile and non volatile memory. The Volatile memories such as SRAM and DRAM used as a main memory and non volatile memory like flash memory.
V, Thangamani.
core   +1 more source