Results 81 to 90 of about 6,570 (171)

Design of a Compact 5-bit SAR ADC With Voltage Interpolating Comparison for On-Chip Temperature Sensors

IEEE Access
This paper presents a cost-effective compact 5-bit successive approximation register (SAR) analog-to-digital converter (ADC) for state-of-the-art computing processor and memory applications.
Chan-Keun Kwon, Young-Jae Min
doaj   +1 more source

New and Accurate Online Self-Test Methods for Gain and Offset Errors of 10-Bit SAR-ADC

Journal of Electrical and Computer Engineering
The absolute quantization range of the successive approximation register (SAR) ADC is impacted by nonideality parameters like offset and gain error, which can make its performance at a lower level in high resolution applications.
Mohammed Abdulmahdi Mohammedali, Qais Al-Gayem   +1 more
doaj   +1 more source

Enhanced Linearity in Intracranial Pressure Monitoring System Through Sample Isolation Bridge ROIC

Applied Sciences
This study presents a sample isolation bridge readout integrated circuit (ROIC) specifically designed for intracranial pressure (ICP) monitoring systems. The ROIC consists of an instrumentation amplifier (IA) and a successive approximation register (SAR)
Shaopeng Yao, Qiang Shan, Jinjin Xiao, Zihui Wei, Shuilong Huang   +4 more
doaj   +1 more source

Implementation of the onboard ADC and DAC on the Spartan 3E FPGA platform. [PDF]

, 2012
The objective of this project is to first interface the on board ADC and DAC available in the Spartan 3E FPGA platform, so that the real signals too can be processed by the FPGA board.
Choudhuri, Arghyapriya, Mascharak, Satyaki   +1 more
core  

A Wireless, Mechanically Flexible, 25μm-Thick, 65,536-Channel Subdural Surface Recording and Stimulating Microelectrode Array with Integrated Antennas. [PDF]

2023 IEEE Symp VLSI Technol Circuits (2023), 2023
Zeng N, Jung T, Sharma M, Eichler G, Fabbri J, Cotton RJ, Spinazzi E, Youngerman B, Carloni L, Shepard KL.   +9 more
europepmc   +1 more source

An Improved Solution for the Fast-Locking All Digital SAR DLL [PDF]

, 2013
All digital successive approximation register-controlled delay-lock loops (SAR DLL) are widely used in system-on-chip to solve the clock generation and skew problems for their fast-locking characteristic.
Chen, Junning, Lu, Shibin, Xu, Tailong
core   +1 more source

A Study of Successive Approximation Registers and Implementation of an Ultra-Low Power 10-bit SAR ADC in 65nm CMOS Technology

, 2011
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to-Digital Converter in medical application such as pacemaker. The demand for long battery life-time in these applications poses the requirement for designing ultra-low power SAR ADCs.
openaire   +1 more source

Design of laboratory device with FPAA [PDF]

, 2015
Tento dokument popisuje vlastnosti a možnosti programovatelných analogových obvodů (FPAAs), konkrétně pak typ AN221E04 a vývojové desky s tímto zařízením.
Veselý, Jan
core  

A 1-kS/s 12-bit SAR ADC With Burst Conversion for Anti-Leakage Current

IEEE Access
A 1-kS/s 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) which performs burst conversion is proposed to reduce the loss of the sampled analog signal due to leakage current in the capacitors of the capacitor-based digital ...
Haewoon Son, Hoyong Jung, Young-Chan Jang   +2 more
doaj   +1 more source

Radar systems for the water resources mission, volume 1 [PDF]

The state of the art determination was made for radar measurement of: soil moisture, snow, standing and flowing water, lake and river ice, determination of required spacecraft radar parameters, study of synthetic-aperture radar systems to meet these ...
Claassen, J. P., Erickson, R. L., Fong, R. K. T., Hanson, B. C., Komen, M. J., Mcmillan, S. B., Moore, R. K., Parashar, S. K.   +7 more
core   +1 more source