Results 11 to 20 of about 130,965 (297)
Electronics Letters, 2023 This letter presents a low‐noise implementation of the switched‐capacitor (SC) DC servo loop (DSL) in the capacitively coupled chopper instrumentation amplifier (CCIA).
Geng Mu +3 more
doaj +1 more source
A Single-Bit Incremental Second-Order Delta-Sigma Modulator with Coarse-Fine Input Buffer
Applied Sciences, 2022 This paper presents an incremental second-order delta-sigma modulator with a coarse-fine input buffer in 180-nm CMOS. The modulator’s architecture was implemented as a second-order cascade of integrators with a feedback structure.
Mookyoung Yoo +7 more
doaj +1 more source
Reduction the effects of opamp finite gain and offset voltage in LDI termination with a minus one half delay of SC ladder filters [PDF]
Serbian Journal of Electrical Engineering, 2006 In this paper a combined approach for reducing the effects of op amp imperfections (finite gain A and offset voltage VOS) in first-order SC cell, realizing LDI (loss less discrete integrator) termination with a minus one half delay is presented.
Radev Nikolay A., Ivanov Kantcho P.
doaj +1 more source
Double-Sampling Single-Loop EA Modulator Topologies for Broad-band Applications [PDF]
, 2006 This paper presents novel double sampling high-order single loop sigma-delta modulator structures for wide-band applications. To alleviate the quantization noise folding into the inband frequency region, two previously reported techniques are used.
Rodríguez Vázquez, Ángel Benito +2 more
core +1 more source
14-bit 2.2-MS/s sigma-delta ADC's [PDF]
, 2000 This paper presents the design and test results of a fourth-order and sixth-order 14-bit 2.2-MS/s sigma-delta analog-to-digital converter (ADC). The analog modulator and digital decimator sections were implemented in a 0.35 μm CMOS double-poly triple ...
Geddie, C et al +3 more
core +2 more sources
Novel active-compensated weighted summer [PDF]
, 1980 A summer amplifier with extended bandwidth is proposed. Compensation of the frequency characteristics is achieved by employing two operational amplifiers instead of external reactive ...
Huertas Díaz, José Luis +1 more
core +1 more source
Open-Loop Switched-Capacitor Integrator for Low Voltage Applications [PDF]
Electronics, 2020 An architecture of a switched-capacitor integrator that includes a charge buffer operating in an open-loop is hereby proposed. As for the switched-capacitor filters, the gain of the proposed integrator, which is given by the input/output capacitor ratio, ensures desensitization to process, voltage, and temperature variations.
D'amico S. +3 more
openaire +1 more source
Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios [PDF]
, 2006 This paper presents novel double-sampling cascaded sigma-delta modulator topologies for wideband applications. The proposed modulator structures employ finite impulse response (FIR) noise transfer function (NTF) to achieve the aggressive noise shaping ...
Rodríguez Vázquez, Ángel Benito +2 more
core +1 more source
Accurate and simple modeling of amplifier dc gain nonlinearity in switched-capacitor circuits [PDF]
, 2007 This paper presents an accurate and simple model for dc gain nonlinearity of operational amplifiers used in the switched-capacitor circuits such as the sigma-delta modulators.
Rodríguez Vázquez, Ángel Benito +1 more
core +1 more source
Multirate cascaded discrete-time low-pass ΔΣ modulator for GSM/Bluetooth/UMTS [PDF]
, 2010 This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility with the sampling frequency. The
Bos, Lynn +4 more
core +1 more source