Results 11 to 20 of about 20,607 (273)
Reducing MOSFET 1/f Noise and Power Consumption by "Switched Biasing" [PDF]
Switched biasing is proposed as a technique for reducing the 1/f noise in MOSFET's. Conventional techniques, such as chopping or correlated double sampling, reduce the effect of 1/f noise in electronic circuits, whereas the switched biasing technique ...
Gierkink, Sander L.J. +3 more
core +2 more sources
Double-Sampling Single-Loop EA Modulator Topologies for Broad-band Applications [PDF]
This paper presents novel double sampling high-order single loop sigma-delta modulator structures for wide-band applications. To alleviate the quantization noise folding into the inband frequency region, two previously reported techniques are used.
Rodríguez Vázquez, Ángel Benito +2 more
core +1 more source
Effects of Non-Idealities of OP-AMPs on Active Filters: An Analytical Study
This paper studies the effect of non-idealities of OP AMPs on the performance of active filters. The non-ideality is considered in terms of finite gain, finite gain-bandwidth product, slew-rate, and offset voltages.
Prem Bhushan Mital, Umesh Kumar
doaj +1 more source
Multirate cascaded discrete-time low-pass ΔΣ modulator for GSM/Bluetooth/UMTS [PDF]
This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility with the sampling frequency. The
Bos, Lynn +4 more
core +1 more source
CMOS-3D smart imager architectures for feature detection [PDF]
This paper reports a multi-layered smart image sensor architecture for feature extraction based on detection of interest points. The architecture is conceived for 3-D integrated circuit technologies consisting of two layers (tiers) plus memory.
D. Cabello +6 more
core +1 more source
Design and Analytical Study of Strays-Insensitive Switched-Capacitor Filters
Use of analog circuit elements in active networks have become very common and the demand for their miniaturization is increasing day by day. Though several methods are available for the miniaturization of these elements through large scale integration on
Umesh Kumar
doaj +1 more source
A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology [PDF]
This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully differential switched-capacitor circuits with a clock frequency of 35.2 MHz, and has a power consumption of ...
Medeiro Hidalgo, Fernando +2 more
core +1 more source
Compensation of Distribution System Voltage using DVR [PDF]
A dynamic voltage restorer (DVR) is a power-electronic controller that can protect sensitive loads from disturbances in the supply system. In this paper, it is demonstrated that this device can tightly regulate the voltage at the load terminal against ...
Ghosh, Arindam, Ledwich, Gerard
core +2 more sources
A 90μW 12MHz Relaxation Oscillator with a -162dB FOM [PDF]
A relaxation oscillator exploits a noise filtering technique implemented with a switched-capacitor circuit to minimize phase noise. A 65nm CMOS design produces a sawtooth waveform, has a frequency tuning range of 1 to 12MHz and a constant frequency ...
Geraedts, P.F.J. +4 more
core +2 more sources
Companding switched capacitor filters [PDF]
In this paper, two possible switched capacitor implementations of companding filters are discussed. The governing difference equations, an estimate of the increase in the dynamic range for a given power consumption and possible topologies are given.
N. Krishnapura +3 more
openaire +1 more source

